MAX520ACAP データシートの表示（PDF） - Maxim Integrated

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MAX520ACAP

Quad/Octal, 2-Wire Serial 8-Bit DACs with Rail-to-Rail Outputs

Maxim Integrated 

Quad/Octal, 2-Wire Serial 8-Bit DACs

with Rail-to-Rail Outputs

RIN

RF

RIN

RF

RT

DAC

(1%)

DAC

16kΩ

(1%)

MAX520A

Figure 15a. Typical Trimming Circuit

Figure 15b. MAX520A Trimming Circuit

__________Applications Information

Shutdown Mode

In shutdown mode, the MAX520/MAX521 reference

inputs are disconnected from the R-2R ladder inputs,

which saves power when the reference is not powered

down. In addition, the MAX521’s output buffers are dis-

abled, greatly reducing the supply current. The

MAX520’s operating supply current does not change in

shutdown mode. The Command Byte and Output Byte

section describes how to enter and exit shutdown

mode.

Power-Supply Bypassing and

Ground Management

Bypass VDD with a 0.1µF capacitor, located as close to

VDD and DGND as possible. The analog ground

(AGND) and digital ground (DGND) pins should be

connected in a “star” configuration to the highest quali-

ty ground available, which should be located as close

to the MAX521 as possible.

Careful PC board layout minimizes crosstalk among

DAC outputs, reference inputs, and digital inputs.

Figure 16 shows the suggested PC board layout to mini-

mize crosstalk.

OUT2

OUT3

REF2

REF3

SYSTEM GND

PIN1

OUT1

OUT0

REF1

REF0

Figure 16. PC Board Layout for Minimizing Crosstalk (MAX521

bottom view, DIP package)

16 ______________________________________________________________________________________

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