MC100E143FNG(2016) データシートの表示（PDF） - ON Semiconductor
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MC100E143FNG Datasheet PDF : 7 Pages
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MC10E143, MC100E143
SEL D8 D7 D6 D5 VCCO Q8
25 24 23 22 21 20 19
MR 26
18 Q7
CLK1 27
17 Q6
CLK2 28
16 VCC
VEE
1
NC 2
D0 3
D1 4
Pinout: 28-Lead PLCC
(Top View)
15 Q5
14 VCCO
13 Q4
12 Q3
5 6 7 8 9 10 11
D2 D3 D4 VCCO Q0 Q1 Q2
* All VCC and VCCO pins are tied together on the die.
Warning: All VCC, VCCO, and VEE pins must be externally
connected to Power Supply to guarantee proper operation.
Figure 1. 28-Lead Pinout
D0
MUX
D
R
Q0
D1
MUX
D
R
Q1
D2
MUX
D
R
Q2
D3
MUX
D
R
Q3
MUX
D
Q8
D8
R
SEL
CLK1
CLK2
MR
Figure 2. Logic Diagram
Table 1. PIN DESCRIPTION
PIN
FUNCTION
D0 − D8
SEL
CLK1, CLK2
MR
Q0 − Q8
NC
VCC, VCCO
VEE
ECL Parallel Data Inputs
ECL Mode Select Input
ECL Clock Inputs
ECL Master Reset
ECL Data Outputs
No Connect
Positive Supply*
Negative Supply
*From VCC pin to each VCCO pin is an internal 100 W resistor.
Table 2. FUNCTIONS
SEL
L
Load
H
Hold
Mode
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