MC100EP51D データシートの表示（PDF） - ON Semiconductor
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MC100EP51D Datasheet PDF : 11 Pages
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MC10EP51, MC100EP51
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 17)
−40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
IEE
VOH
VOL
VIH
VIL
VIHCMR
Power Supply Current
Output HIGH Voltage (Note 18)
Output LOW Voltage (Note 18)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 19)
26
34
44
26
35
45
28
37
47 mA
−1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV
−1945 −1820 −1695 −1945 −1820 −1695 −1945 −1820 −1695 mV
−1225
−880 −1225
−880 −1225
−880 mV
−1945
−1625 −1945
−1625 −1945
−1625 mV
VEE + 2.0
0.0
VEE + 2.0
0.0
VEE + 2.0
0.0 V
IIH
Input HIGH Current
IIL
Input LOW Current
150
150
150 mA
0.5
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
17. Input and output parameters vary 1:1 with VCC.
18. All loading with 50 W to VCC − 2.0 V.
19. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)
−40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ
fmax
tPLH,
tPHL
Maximum Frequency (Figure 2)
>3
>3
>3
Propagation Delay to Output Differential
CLK, CLK to Q, Q
10 250 300 350 270 320 370 300 350
100 275 340 425 300 375 450 350 425
Max Unit
GHz
ps
420
500
RESET to Q, Q 300 380 450 325 400 475 350 425 500
tRR
Reset Recovery
tS
Setup Time
tH
Hold Time
tPW
Minimum Pulse Width
RESET
150
150
150
ps
100
100 80
100
ps
100
100 40
100
ps
500 440
500 440
500 440
tJITTER Cycle−to−Cycle Jitter (Figure 2)
.2
<1
.2
<1
.2
< 1 ps
tr
Output Rise/Fall Times
tf
(20% − 80%)
Q, Q
ps
70 120 170 80 130 180 100 150 200
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
20. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.
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