MC10H175
APPLICATION INFORMATION
The MC10H175 is a high speed, low power quint latch. It
features five D type latches with common reset and a
common two−input clock. Data is transferred on the
negative edge of the clock and latched on the positive edge.
The two clock inputs are “OR”ed together.
Any change on the data input will be reflected at the
outputs while the clock is low. The outputs are latched on the
positive transition of the clock. While the clock is in the high
state, a change in the information present at the data inputs
will not affect the output information. THE RESET INPUT
IS ENABLED ONLY WHEN THE CLOCK IS IN THE
HIGH STATE.
LOGIC DIAGRAM
D0 10
D
Q
CR
14 Q0
D1 12
D
Q
CR
15 Q1
D2 13
D3 9
D4 5
C0 6
C1 7
RESET 11
D
Q
2 Q2
CR
D
Q
3 Q3
CR
D
Q
4 Q4
CR
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8
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