MC1495 データシートの表示（PDF） - ON Semiconductor
部品番号
コンポーネント説明
メーカー
MC1495 Datasheet PDF : 20 Pages
| |||
MC1495
− 15 V
− 15 V
10 k
RX
RY
10 k 10 k
3.9 k 3.0 k 3.0 k
0.1 µF
0.1 µF
4 10 11
+
5 671
14
−
7
3+
4
10 k
MC1495
6
MC1741C
10 k
VX′
9
+
2
+
2
−
5
10 k
3
13
8
12
13 k
12 k
18 k
1
20 k
5.0 k
Scale P3
Factor
Adjust
To Offset
Adjust
5.0 k
P4
Output
Offset
(See Figure 13)
Adjust
0 ≤ VX′ ≤ +10 V
−10 V ≤ VZ ≤ +10 V
Figure 25. Divide Circuit
+15 V
VO
VO =
−10 VZ
VX
VZ
KVO2 MC1495 +
−
+
VZ
+
−
VO
+
KVO2 = −VZ
or
VO =
|VZ|
K
Figure 26. Basic Square Root Circuit
Square Root
A special case of the divide circuit in which the two inputs
to the multiplier are connected together is the square root
function as indicated in Figure 26. This circuit may suffer
from latch-up problems similar to those of the divide circuit.
Note that only one polarity of input is allowed and diode
clamping (see Figure 27) protects against accidental
latch-up.
This circuit also may be adjusted in the closed-loop mode
as follows:
1. Set VZ to −0.01 V and adjust P4 (output offset) for
VO = +0.316 V, being careful to approach the output
from the positive side to preclude the effect of the
output diode clamping.
2. Set VZ to −0.9 V and adjust P2 (X adjust) for
VO = +3.0 V.
3. Set VZ to −10 V and adjust P3 (scale factor adjust)
for VO = +10 V.
4. Steps 1 through 3 may be repeated as necessary to
achieve desired accuracy.
AC APPLICATIONS
The applications that follow demonstrate the versatility of
the monolithic multiplier. If a potted multiplier is used for
these cases, the results generally would not be as good
because the potted units have circuits that, although they
optimize dc multiplication operation, can hinder ac
applications.
Frequency doubling often is done with a diode where
the fundamental plus a series of harmonics are
generated. However, extensive filtering is required to obtain
the desired harmonic, and the second harmonic obtained
under this technique usually is small in magnitude and
requires amplification.
When a multiplier is used to double frequency the second
harmonic is obtained directly, except for a dc term, which
can be removed with ac coupling.
eo = KE2 cos2 ωt
eo =
KE2
2
(1 + cos 2ωt).
A potted multiplier can be used to obtain the double
frequency component, but frequency would be limited by its
internal level-shift amplifier. In the monolithic units, the
amplifier is omitted.
In a typical doubler circuit, conventional ± 15 V supplies
are used. An input dynamic range of 5.0 V peak-to-peak is
allowed. The circuit generates wave-forms that are double
frequency; less than 1% distortion is encountered without
filtering. The configuration has been successfully used in
excess of 200 kHz; reducing the scale factor by decreasing
the load resistors can further expand the bandwidth.
Figure 29 represents an application for the monolithic
multiplier as a balanced modulator. Here, the audio input
signal is 1.6 kHz and the carrier is 40 kHz.
http://onsemi.com
13
Share Link: 