MSM7660 データシートの表示（PDF） - Oki Electric Industry
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MSM7660 Datasheet PDF : 35 Pages
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¡ Semiconductor
MSM7660
OPERATION MODE SETTING
The video mode includes ;
1. Internal terminal mode to be directly set by a dedicated terminal
2. Register setting mode to be specified by setting the internal registers
These modes can be changed by the mode register MRA [4].
The reset state (default) is the external terminal mode.
The following registers can be set in the external terminal mode.
MRA[3]
input signal mode
*0: Composite video input
1: S-video input
MRA[2 : 0] input mode
*000:
001:
010:
100:
101:
NTSC ITU-R601
NTSC Square Pixel
MTSC 4Fsc
PAL ITU-R601
PAL Square Pixel
13.5MHz
12.27MHz
14.32MHz
13.5MHz
14.75MHz
INTERNAL REGISTERS
Register List
Register List
Mode Register A (MRA)
Mode Register B (MRB)
Horizontal Sync Trimer (HSYT)
Horizontal Clamp Trimer (HCLT)
Horizontal Sync Delay (HSDL)
Horizontal Valid Trimer (HVALT)
Vertical Valid Trimer (VVALT)
Luminance Control (LUMC)
AGC Loop filter Control (AGCLF)
Sync separation level (SSEPL)
Chrominance Control (CHRC)
ACC Loop filter Control (ACCCLF)
Hue Control (HUE)
Output enable Control (OEC)
Output Phase Control for Data Y
Output Phase Control for Data C
Data byte
Subaddress
D7 D6 D5 D4 D3 D2 D1 D0
0
MRA7 MRA6 MRA5 MRA4 MRA3 MRA2 MRA1 MRA0
1
MRB7 MRB6 MRB5 MRB4 MRB3 MRB2 MRB1 MRB0
2
HSYT7 HSYT6 HSYT5 HSYT4 HSYT3 HSYT2 HSYT1 HSYT0
3
HCLT7 HCLT6 HCLT5 HCLT4 HCLT3 HCLT2 HCLT1 HCLT0
4
HSDL7 HSDL6 HSDL5 HSDL4 HSDL3 HSDL2 HSDL1 HSDL0
5
HVALT7 HVALT6 HVALT5 HVALT4 HVALT3 HVALT2 HVALT1 HVALT0
6
VVALT7 VVALT6 VVALT5 VVALT4 VVALT3 VVALT2 VVALT1 VVALT0
7
LUMC7 LUMC6 LUMC5 LUMC4 LUMC3 LUMC2 LUMC1 LUMC0
8
AGCLF7 AGCLF6 AGCLF5 AGCLF4 AGCLF3 AGCLF2 AGCLF1 AGCLF0
9
SSEPL6 SSEPL5 SSEPL4 SSEPL3 SSEPL2 SSEPL1 SSEPL0
A
CHRC7 CHRC6 CHRC5 CHRC4 CHRC3 CHRC2 CHRC1 CHRC0
B
ACCLF7 ACCLF6 ACCLF5 ACCLF4 ACCLF3 ACCLF2 ACCLF1 ACCLF0
C
HUE7 HUE6 HUE5 HUE4 HUE3 HUE2 HUE1 HUE0
D
OEC7 OEC6 OEC5 OEC4 OEC3 OEC2 OEC1 OEC0
E
OPCY7 OPCY6 OPCY5 OPCY4 OPCY3 OPCY2 OPCY1 OPCY0
F
OPCC7 OPCC6 OPCC5 OPCC4 OPCC3 OPCC2 OPCC1 OPCC0
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