¡ Semiconductor
PEDL7662-02
MSM7662
Input Signal Level
The figure below shows the recommended range of the input signal, received in an 8-bit straight
binary format.
255
reserved
246
200
Iuminance
chrominance
+DC
NTSC:60
(PAL:63)
4
0
input black level
sync
13
input sync-tip level
CVBS[7:0] input range
The above input conditions are ideal. Because analog signals are normally input at different
levels, the exact settings described above are difficult to achieve. While maintaining the ratio of
White Peak (100%)/SYNC = 100IRE/40IRE (NTSC), if the input signal is set within the A/D
converter's voltage range/the Y digital output will be output by digital AGC operation with the
pedestal position set at the black level (16) and the white peak position (100%) set at the peak level
(235) even if the peak level does not reach 196 (200 – 4).
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