MSM7662 データシートの表示（PDF） - Oki Electric Industry

部品番号

コンポーネント説明

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MSM7662

NTSC/PAL Digital Video Decoder

Oki Electric Industry 

¡ Semiconductor

PEDL7662-02

MSM7662

A/D Converter Support Signal

The waveform of the HSY signal, shown below, provides clamp timing to the A/D converter

when HSY clamp (digital clamp) is selected. The start and end edges of the clamp pulse have a

variable range from the sync tip to the pedestal position. (HSY is an internal signal.)

CVBS

BURST

COLOR

BURST

HSY

Output Timing

• ITU-RBT.656 output

sync tip

A/D Converter Support Signal

T : clock periods 37 ns normal (1/27 MHz)

SAV : start of active video timing reference code

EAV : end of active video timing reference code

Pedestal

Digital line {1716T (NTSC, 525), 1728T (PAL, 625)}

4T

Digital line blanking

276T (NTSC, 525)

288T (PAL, 625)

Multiplexed video data

Cb0 Y00 Cr0 Cb1 Y10 Cr1 Y11

4T

Digital active line

Video data block (1440T)

ITU-RBT.656 Output (Data in one line in which video data presents)

During the blanking interval, data is output with the Y value.

Note:

Digital line 1716T (NTSC, 525) and 1728T (PAL, 625) are not maintained at the next line.

Digital active line 1440T of the line immediately after VVALID falls and the 10th or 11th

line after VSYNC_L rises will fluctuate due to pixel compensation. Especially when a

non-standard signal is input, the line immediately after VVALID falls will fluctuate

largely due to instability of the input signal. Due to phenomena such as an increase in

the number of lines for a standard signal and a decrease in the number of lines for a non-

standard signal, it may not be possible to guarantee correct EAV and SAV functionality.

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