NCP1239FDR2G(2005) データシートの表示（PDF） - ON Semiconductor

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NCP1239FDR2G
(Rev.:2005)

Low−Standby High Performance PWM Controller

ON Semiconductor 

Vcc regulation

PWM

NCP1239

Stby stby is left

Short−circuit

16.4V

11.2V

Nom

Pout

6.9V

Timer

100ms*

0.9V

flag

7.5ms*

SS

100ms*

100ms*

One Vcc cycle is skipped to

lower the burst mode duty

cycle to typically 5% in

fault conditions.

Short−circuit

100ms*

PFC

Vcc

Standby

is confirmed

If the fault had disappeared

the SMPS would recover

normal operation

*This time is programmed by the Pin 6 capacitor. Cpin6 = 390 nF nearly sets the following intervals:

− Soft−Start Time (Tss):7.5 ms

− Jittering Period (Tjittering): 10 ms

− Fault Detection Delay (Tdelay): 100 ms

More generally, the times approximately depend on Cpin6 as follows:

− Tss = 7.5 ms * Cpin6 / 390 nF

− Tjittering =10 ms * Cpin6 / 390 nF

− Tdelay =100 ms * Cpin6 / 390 nF

Figure 38.

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