NCP1351 データシートの表示（PDF） - ON Semiconductor

部品番号

コンポーネント説明

メーカー

NCP1351

Variable Off Time PWM Controller

ON Semiconductor 

NCP1351

Current Sense Pin

Current Sense Resistor

Figure 6. The Voltage on the Current Sense Pin

Below are a few recommendations concerning the wiring

and the PCB layout:

• A small 22 pF capacitor can be placed between the CS

pin and the controller ground. Place it as close as

possible to the controller.

• Do not place the offset resistor in the vicinity of the

sense element, but put it close to the controller as well.

• Regulation by frequency

• The power a flyback converter can deliver relates to the

energy stored in the primary inductance Lp and obeys

the following formulae:

Pout_DCM

+

1

2

LP

Ipeak2

FSW

h

(eq. 5)

Pout_CCM + 12 LP(Ipeak2 * Ivalley2)FSW h (eq. 6)

Where:

η (eta) is the converter efficiency

Ipeak is the peak inductor current reached at the on time

termination

Ivalley represents the current at the end of the off time. It

equals zero in DCM.

FSW is the operating frequency.

VCt

Minimum Frequency

Figure 7. The Voltage Across the Sense

Resistor

Thus, to control the delivered power, we can either play on

the peak current setpoint (classical peak current mode

control) or adjust the switching frequency by keeping the

peak current constant. We have chosen the second scheme

in this NCP1351 for simplicity and ease of implementation.

Thus, once the peak current has been selected, the feedback

loop automatically reacts to satisfy Equations 5 and 6. The

external capacitor that you connect between pin 2 and

ground (again, place it close to the controller pins) sets the

maximum frequency you authorize the converter to operate

up to. Normalized values for this timing capacitor are

270 pF (65 kHz) and 180 pF (100 kHz). Of course, different

combinations can be tried to design at higher or lower

frequencies. Please note that changing the capacitor value

does not affect the operating frequency at nominal line and

load conditions. Again, the operating frequency is selected

by the feedback loop to cope with Equations 5 and 6

definitions.

The feedback current controls the frequency by changing

the timing capacitor end of charge voltage, as illustrated by

Figure 8.

Controlled by the

FB Current

Pout

Decreases

Pout

Increases

ICt = 10 mA

Maximum Frequency

Figure 8. The Current Injected into the Feedback Loop Adjusts the Switching Frequency

http://onsemi.com

9

Share Link: