PIC18LF4553-EP データシートの表示（PDF） - Microchip Technology

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PIC18LF4553-EP

28/40/44-Pin High-Performance, Enhanced Flash, USB Microcontrollers with 12-Bit A/D and nanoWatt Technology

Microchip Technology 

PIC18F2458/2553/4458/4553

TABLE 1-2: PIC18F2458/2553 PINOUT I/O DESCRIPTIONS (CONTINUED)

Pin Name

Pin

Number Pin

SPDIP, Type

SOIC

Buffer

Type

Description

RA0/AN0

2

RA0

AN0

RA1/AN1

3

RA1

AN1

RA2/AN2/VREF-/CVREF

4

RA2

AN2

VREF-

CVREF

RA3/AN3/VREF+

5

RA3

AN3

VREF+

RA4/T0CKI/C1OUT/RCV 6

RA4

T0CKI

C1OUT

RCV

PORTA is a bidirectional I/O port.

I/O TTL

I Analog

Digital I/O.

Analog input 0.

I/O TTL

I Analog

Digital I/O.

Analog input 1.

I/O TTL

I Analog

I Analog

O Analog

Digital I/O.

Analog input 2.

A/D reference voltage (low) input.

Analog comparator reference output.

I/O TTL

I Analog

I Analog

Digital I/O.

Analog input 3.

A/D reference voltage (high) input.

I/O ST

I

ST

O

—

I

TTL

Digital I/O.

Timer0 external clock input.

Comparator 1 output.

External USB transceiver RCV input.

RA5/AN4/SS/

HLVDIN/C2OUT

RA5

AN4

SS

HLVDIN

C2OUT

7

I/O TTL

I Analog

I

TTL

I Analog

O

—

Digital I/O.

Analog input 4.

SPI slave select input.

High/Low-Voltage Detect input.

Comparator 2 output.

RA6

—

—

—

See the OSC2/CLKO/RA6 pin.

Legend: TTL = TTL compatible input

ST = Schmitt Trigger input with CMOS levels

O = Output

CMOS = CMOS compatible input or output

I

= Input

P

= Power

Note 1: Alternate assignment for CCP2 when CCP2MX Configuration bit is cleared.

2: Default assignment for CCP2 when CCP2MX Configuration bit is set.

DS39887B-page 10

Preliminary

© 2007 Microchip Technology Inc.

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