QL4016-3PLI データシートの表示（PDF） - Unspecified

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QL4016-3PLI

16,000 Usable PLD Gate QuickRAM ESP Combining Performance, Density and Embedded RAM

Unspecified 

Power-up Sequencing

QL4016 QuickRAM Data Sheet Rev I

VCCIO

VCC

(VCCIO -VCC)MAX

VCC

400 us

Time

Figure 8: Power-up Requirements

The following requirements must be met when powering up the device (refer to Figure 8):

• When ramping up the power supplies keep (VCCIO -VCC)MAX ≤ 500 mV. Deviation from

this recommendation can cause permanent damage to the device.

• VCCIO must lead VCC when ramping the device.

• The power supply must take greater than or equal to 400 µs to reach VCC. Ramping

to VCC/VCCIO earlier than 400 µs can cause the device to behave improperly.

An internal diode is present in-between VCC and VCCIO, as shown in Figure 9.

V CC

V CCIO

Internal Logic

Cells, RAM

blocks, etc

IO Cells

Figure 9: Internal Diode Between VCC and VCCIO

© 2002 QuickLogic Corporation

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