S5G9801X01/S5G9803X01
INFRAED REMOCON RECEIVER
READER
DATA ‘0’
Receiving Data
Register Clock
(REGCK)
Check Pulse
(CHP)
READER DATA ‘1’
0.42ms 0.84ms
Figure 7.
5. CODE BIT COMPARISON
In order to prevent interference with other machines and apparatuses, C1, C2 and C3 code bits are provided for
checking whether or not the transmitter codes agree to the receiver codes.
Only when both codes agree, the internal latch pulse is generated to latch receiving data, and output is raised from
“L” level to “H” level.
If both codes do not agree, latch pulse is not generated and output remains at “L” level.
Code bits used differ depending on receiver as shown below:
CODE BIT
C1
C2
C3
C2
0
1
1
0
1
1
S5G9801X01C2, ⋅⋅⋅⋅⋅⋅ C3 is used.
S5G9803X01C1, ⋅⋅⋅⋅⋅⋅ C2 is used.
* CODE BIT “0”, “0” cannot be used.
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