SC174 データシートの表示（PDF） - Semtech Corporation

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SC174

4A EcoSpeed™ Synchronous Step-Down Regulator with Optional Ultrasonic Power Save

Semtech Corporation 

SC174

Applications Information (continued)

Ultrasonic Power Save Operation

The SC174 provides ultrasonic power save operation at

light loads, with the minimum operating frequency fixed

at 25kHz. This is accomplished using an internal timer

that monitors the time between consecutive high-side

gate pulses. If the time exceeds 40µs, DL drives high to

turn the low-side MOSFET on. This draws current from

VOUT through the inductor, forcing both VOUT and VFB to

fall. When VFB drops to the 750mV threshold, the next DH

on-time is triggered. After the on-time is completed the

high-side MOSFET is turned off and the low-side MOS-

FET turns on. The low-side MOSFET remains on until the

inductor current ramps down to zero, at which point the

low-side MOSFET is turned off.

power save enabled, this can force VOUT to slowly rise

and reach the over-voltage threshold, resulting in a hard

shutdown. Smart power save prevents this condition.

When the FB voltage exceeds 10% above nominal (ex-

ceeds 825mV), the device immediately disables power-

save, and DL drives high to turn on the low-side MOSFET.

This draws current from VOUT through the inductor and

causes VOUT to fall. When VFB drops back to the 750mV trip

point, a normal TON switching cycle begins. This method

prevents a hard OVP shutdown and also cycles energy

from VOUT back to VIN. Figure 6 shows typical waveforms

for the Smart Power Save feature.

Because the on-times are forced to occur at intervals

no greater than 40µs, the frequency will not fall below

~25kHz. Figure 5 shows ultrasonic power save opera-

tion.

Figure 6 — Smart Power Save

Current Limit Protection

Figure 5 — Ultrasonic Power Save Operation

Smart Power Save Protection

Active loads may leak current from a higher voltage into

the switcher output. Under light load conditions with

© 2010 Semtech Corporation

The device features fixed current limiting, which is ac-

complished by using the RDS(ON) of the lower MOSFET for

current sensing. While the low-side MOSFET is on, the

inductor current flows through it and creates a voltage

across the RDS(ON). During this time, the voltage across the

MOSFET is negative with respect to ground. During this

time, If this MOSFET voltage drop exceeds the internal

reference voltage, the current limit will activate. The cur-

rent limit then keeps the low-side MOSFET on and will

not allow another high side on-time, until the current in

the low-side MOSFET reduces enough to drop below the

internal reference voltage once more. This method regu-

lates the inductor valley current at the level shown by ILIM

in Figure 7.

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