SL74HCT132D データシートの表示（PDF） - System Logic Semiconductor

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SL74HCT132D

Quad 2-Input NAND Gate with Schmitt-Trigger Inputs

System Logic Semiconductor 

SL74HCT132

DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)

Symbol

Parameter

Test Conditions

VT+max

Maximum Positive-

Going Input Threshold

Voltage

VOUT=0.1 V

IOUT≤ 20 µA

VT+min

Minimum Positive-

Going Input Threshold

Voltage

VOUT=0.1 V

IOUT ≤ 20 µA

VT-max

Maximum Negative-

Going Input Threshold

Voltage

VOUT=VCC-0.1 V

IOUT≤ 20 µA

VT-min

Minimum Negative-

Going Input Threshold

Voltage

VOUT=VCC-0.1 V

IOUT ≤ 20 µA

VHmax

Note

VHmin

Note

VOH

Maximum Hysteresis

Voltage

Minimum Hysteresis

Voltage

Minimum High-Level

Output Voltage

VOL Maximum Low-Level

Output Voltage

IIN

Maximum Input

Leakage Current

VOUT=0.1 V or VCC-0.1 V

IOUT ≤ 20 µA

VOUT=0.1 V or VCC-0.1 V

IOUT ≤ 20 µA

VIN≤VT-min or VT+max

Iout ≤ 20 µA

VIN≤VT-min or VT+max

IOUT ≤ 4.0 mA

IOUT ≤ 5.2 mA

VIN ≥VT+max

IOUT ≤ 20 µA

VIN≥ VT+max

IOUT ≤ 4.0 mA

IOUT ≤ 5.2 mA

VIN=VCC or GND

ICC

Maximum Quiescent

VIN=VCC or GND

Supply Current

IOUT=0µA

(per Package)

∆ICC Additional Quiescent VIN = 2.4 V, Any One Input

Supply Current

VIN=VCC or GND, Other

Inputs

IOUT=0µA

Note. VHmin>(VT+min)-(VT-max); VHmax=(VT+max)+(VT-min).

VCC

Guaranteed Limit

V 25 °C ≤85 ≤125 Unit

to

°C °C

-55°C

4.5 1.9 1.9 1.9 V

5.5 2.1 2.1 2.1

4.5 1.2 1.2 1.2 V

5.5 1.4 1.4 1.4

4.5 1.2 1.2 1.2 V

5.5 1.4 1.4 1.4

4.5 0.5 0.5 0.5 V

5.5 0.6 0.6 0.6

4.5 1.4 1.4 1.4 V

5.5 1.5 1.5 1.5

4.5 0.4 0.4 0.4 V

5.5 0.4 0.4 0.4

4.5 4.4 4.4 4.4 V

5.5 5.4 5.4 5.4

4.5 3.98 3.84 3.7

4.5 0.1 0.1 0.1 V

5.5 0.1 0.1 0.1

4.5 0.26 0.33 0.4

5.5 ±0.1 ±1.0 ±1.0 µA

5.5 1.0 10 40 µA

≥-55°C

25°C to mA

125°C

5.5

2.9

2.4

SLS

System Logic

Semiconductor

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