ÎÎÎÎSÎÎÎÎWIÎÎÎÎTCHÎÎÎÎINGÎÎÎÎCHÎÎÎÎARÎÎÎÎAChCaÎÎÎÎTrEacRtÎÎÎÎeISriTsÎÎÎÎtIiCcSÎÎÎÎ* (CÎÎÎÎL=5ÎÎÎÎ0pFÎÎÎÎ,TAÎÎÎÎ=2ÎÎÎÎ5_CÎÎÎÎ)SymÎÎÎÎbolÎÎÎÎÎÎÎÎVÎÎÎÎDDÎÎÎÎÎÎÎÎÎÎÎÎMinÎÎÎÎÎÎÎÎÎÎÎÎTypÎÎÎÎÎÎÎÎÎÎÎÎMaxÎÎÎÎÎÎÎÎUÎÎÎÎnitÎÎÎÎ
Output Rise Time
tTLH = (3.0 ns/pF) CL + 30 ns
tTLH = (1.5 ns/pF) CL + 15 ns
tTLH = (1.1 ns/pF) CL + 10 ns
tTLH
ns
5.0
—
100
200
10
—
50
100
15
—
40
80
Output Fall Time
tTHL = (1.5 ns/pF) CL + 25 ns
tTHL = (0.75 ns/pF) CL + 12.5 ns
tTHL = (0.55 ns/pF) CL + 12.5 ns
tTHL
ns
5.0
—
100
200
10
—
50
100
15
—
40
80
Turn–Off Delay Time
tPLH = (1.7 ns/pF) CL + 520 ns
tPLH = (0.66 ns/pF) CL + 217 ns
tPLH = (0.5 ns/pF) CL + 160 ns
tPLH
ns
5.0
—
605
1210
10
—
250
500
15
—
185
370
Turn–On Delay Time
tPHL = (1.7 ns/pF) CL + 420 ns
tPHL = (0.66 ns/pF) CL + 172 ns
tPHL = (0.5 ns/pF) CL + 130 ns
tPHL
ns
5.0
—
505
1650
10
—
205
660
15
—
155
495
Setup Time
tsu
5.0
0
– 40
—
ns
10
0
– 15
—
15
0
– 10
—
Hold Time
th
5.0
80
40
—
ns
10
30
15
—
15
20
10
—
Latch Disable Pulse Width (Strobing Data)
tWH
5.0
250
125
—
ns
10
100
50
—
15
80
40
—
* The formulas given are for the typical characteristics only.
VDD = PIN 18
VSS = PIN 9
A5
B3
C2
D4
LD 1
LOGIC DIAGRAM
BI 7
RBI 10
11 a
12 b
13 c
14 d
15 e
17 f
16 g
8 RBO
6
PHASE
MOTOROLA CMOS LOGIC DATA
MC14544B
3