COMMAND TABLE
Bit Pattern
0000X3X2X1X0
0001X3X2X1X0
00100X2X1X0
00101X2X1X0
01X5X4X3X2X1X0
10000001
* * X5X4X3X2X1X0
1010000X0
1010001X0
1010010X0
1010011X0
1010111X0
1011X3X2X1X0
1100X3 * * *
11100000
11100010
11101110
1010110X0
* * * * * * X1X0
11100011
11110000
1111 * * * *
********
Write Command
(D/C=0, R/W(WR)=0, E(RD)=1)
Set Lower Column Address
Set Higher Column Address
Set Internal Regulator Resistor Ratio
Set Power Control Register
Set Display Start Line
Set Contrast Control Register
Set Segment Re-map
Set LCD Bias
Set Entire Display On/Off
Set Normal/Reverse Display
Set Display On/Off
Set Page Address
Set COM Output Scan Direction
Set Read-Modify-Write Mode
Software Reset
Set End of Read-Modify-Write Mode
Set Indicator On/Off
Comment
Set the lower nibble of the colume address register using
X3X2X1X0 as data bits. The initial display line register is reset to
0000b during POR.
Set the higher nibble of the colume address register using
X3X2X1X0 as data bits. The initial display line register is reset to
0000b during POR.
Internal regulator gain increases as X2X1X0 increased from 000b
to 111b. At POR, X2X1X0 = 100b.
X0=0: turns off the output op-amp buffer (POR)
X0=1: turns on the output op-amp buffer
X1=0: turns off the internal regulator (POR)
X1=1: turns on the internal regulator
X2=0: turns off the internal voltage booster (POR)
X2=1: turns on the internal voltage booster
Set display RAM display start line register from 0-63 using
X5X4X3X2X1X0.
Display start line register is reset to 000000 during POR.
Set Contrast level from 64 contrast steps. Contrast increases (VL6
decreases) as X5X4X3X2X1X0 is increased.
X5X4X3X2X1X0 = 100000b (POR)
X0=0: column address 00h is mapped to SEG0 (POR)
X0=1: column address 83h is mapped to SEG0
Refer to Figure 5 for example.
X0=0: 1/9 bias (POR)
X0=1: 1/7 bias
For setting bias ratio to 1/4, 1/5, 1/6 or 1/8, see Extended Com-
mand Table.
X0=0: normal display (POR)
X0=1: entire display on
X0=0: normal display (POR)
X0=1: reverse display
X0=0: turns off LCD panel (POR)
X0=1: turns on LCD panel
Set GDDRAM Page Address (0-8) using X3X2X1X0
X3=0: normal mode (POR)
X3=1: remapped mode, COM0 to COM[N-1] becomes COM[N-1]
to COM0 when Multiplex ratio is equal to N. See Figure 5
as an example for N equal to 64.
Read-modify-write mode will be entered in which the column
address will not be incremented during display data read. At POR,
Read-modify-write mode is turned OFF.
Initialize the internal status register.
Exit Read-modify-write mode. Column address before entering the
mode will be restored. At POR, Read-modify-write mode is OFF.
X0 = 0: indicator off (POR, no need of second command byte)
X0 = 1: indicator on (second command byte required)
Indicator Display Mode,
X1X0 = 00: indicator off
This second byte command is required X1X0 = 01: indicator on and blinking at ~1 second interval
ONLY when “Set Indicator On” com- X1X0 = 10: indicator on and blinking at ~1/2 second interval
mand is sent.
X1X0 = 11: indicator on constantly
NOP
Command for No Operation
Test Mode Reset
Reserved for IC testing. Do NOT use.
Set Test Mode
Reserved for IC testing. Do NOT use.
Set Power Save Mode
Standby or sleep mode will be entered with compound commands
SSD1815 REV 1.5
14
03/2000
SOLOMON