ST802RT1B データシートの表示（PDF） - STMicroelectronics

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ST802RT1B

10/100 real-time Ethernet 3.3 V transceiver

STMicroelectronics 

ST802RT1A, ST802RT1B

Registers and descriptors description

Reserved: Ignore when read.

LP pause: Indicates that the link partner pause bit is set.

LP selector field: Bits 4:0 of the link partner ability register reflect the value of the Link

partner's selector field. These bits are cleared any time auto-negotiation is restarted or the

chip is reset.

Advertisement bits: Bits 9: 5 of the link partner ability register reflect the abilities of the Link

partner. A “1” on any of these bits indicates that the link partner is capable of performing the

corresponding mode of operation. Bits 9:5 are cleared any time auto-negotiation is restarted

or the ST802RT1x is reset.

Table 16. RN06 [0d06, 0x06]: Auto-negotiation expansion register

Bit

Bit name

Description

Default

RW

type

Type

15:5 RESERVED --

00000000000 RO P

4

Parallel

Detection Fault

1 -> A fault has been detected via the parallel detection

function (updated on read)

0 -> A fault has not been detected

0

RO LH

3

Link Partner 1 -> LP is next-page able

Next Page Able 0 -> LP does not support next pages

0

RO

-

2

Next Page Able

1 -> Local device is next-page able

Fixed to 1

1

RO P

1

Page Received

1 -> Link code word received (updated on read)

0 -> Link code word not yet received

0

RO LH

0

Link Partner

Auto-Negotiation

Able

1 -> LP supports auto-negotiation (updated on read)

0 -> LP does not support auto-negotiation

0

RO LH

Reserved: Ignore when read.

Parallel detection fault: Bit 4 of the auto-negotiation expansion register is a read-only bit

that gets latched high when a parallel detection fault occurs in the auto-negotiation state

machine. For further details, please consult the IEEE standard. The bit is reset to “0” after

the register is read, or when the chip is reset.

LP next page able: Bit 3 of the auto-negotiation expansion register returns a “1” when the

link partner has next page capabilities. It has the same value as bit 15 of the link partner

ability register.

Page received: Bit 1 of the auto-negotiation expansion register is latched high when a new

link code word is received from the link partner, checked, and acknowledged. It remains high

until the chip is reset.

LP auto-negotiation able: Bit 0 of the auto-negotiation expansion register returns a “1”

when the link partner is known to have auto-negotiation capability. Before any auto-

negotiation information is exchanged, or if the link partner does not comply with IEEE auto-

negotiation, the bit returns a value of “0”.

Doc ID 17049 Rev 1

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