SX8725SWLTDT データシートの表示（PDF） - Semtech Corporation

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SX8725SWLTDT

ZoomingADC for sensing data acquisition

Semtech Corporation 

ADVANCED COMMUNICATIONS & SENSING

Table 4. ZoomingADC Specifications

SX8725S

ZoomingADC for sensing data acquisition

DATASHEET

Parameter

Symbol

Condition

Output RMS Noise per over-sample

PGA1. Note 4

PGA2. Note 4

PGA3. Note 4

ADC STATIC PERFORMANCES

Resolution

(No Missing Codes)

Gain Error

Offset Error

Integral Non-Linearity

Differential Non-Linearity

n

Note 5

Note 6

Note 7

n = 16 bits. Note 8

resolution n = 12 bits. Note 9

INL

resolution n = 16 bits. Note 9

resolution n = 12 bits. Note 10

DNL

resolution n = 16 bits. Note 10

Power Supply Rejection Ratio

DC

PSRR

VBATT = 5V +/- 0.3V. Note 11

VBATT = 3V +/- 0.3V. Note 11

ADC DYNAMIC PERFORMANCES

Conversion Time

Throughput Rate (Continuous Mode)

PGA Stabilization Delay

TCONV

1/TCONV

n = 12 bits. Note 12

n = 16 bits. Note 12

n = 12 bits, fs = 250 kHz

n = 16 bits, fs = 250 kHz

Note 13

(see Table 11, page 22)

ZADC ANALOG QUIESCENT CURRENT

ADC Only Consumption

PGA1 Consumption

PGA2 Consumption

PGA3 Consumption

IQ

VBATT = 5.5V/3.3V

VBATT = 5.5V/3.3V

VBATT = 5.5V/3.3V

VBATT = 5.5V/3.3V

ANALOG POWER DISSIPATION: All PGAs & ADC Active

Normal Power Mode

3/4 Power Reduction Mode

1/2 Power Reduction Mode

1/4 Power Reduction Mode

VBATT = 5.5V/3.3V. Note 14

VBATT = 5.5V/3.3V. Note 15

VBATT = 5.5V/3.3V. Note 16

VBATT = 5.5V/3.3V. Note 17

Min

Typ

Max

Unit

205

μV

340

μV

365

μV

6

16

Bits

±0.15

%

±1

LSB

±0.6

LSB

±1.5

LSB

±0.5

LSB

±0.5

LSB

78

dB

72

dB

133

517

1.88

0.483

OSR

fs cycles

fs cycles

kSps

kSps

fs cycles

285/210

μA

104/80

μA

67/59

μA

98/91

μA

4.0/2.0

mW

3.2/1.6

mW

2.4/1.1

mW

1.5/0.7

mW

(1) Gain defined as overall PGA gain GDTOT = GD1 x GD2 x GD3. Maximum input voltage is given by: VIN,MAX = ±(VREF / 2) (OSR / OSR+1).

(2) Offset due to tolerance on GDoff2 or GDoff3 setting. For small intrinsic offset, use only ADC and PGA1.

(3) Measured with block connected to inputs through Amux block. Normalized input sampling frequency for input impedance is fS = 500 kHz

(fS max, worst case). This figure must be multiplied by 2 for fS = 250 kHz, 4 for fS = 125 kHz. Input impedance is proportional to 1/fS.

(4) Figure independent from gain and sampling frequency. fS. The effective output noise is reduced by the over-sampling ratio

(5) Resolution is given by n = 2 log2(OSR) + log2(NELCONV). OSR can be set between 8 and 1024, in powers of 2. NELCONV can be set to 1, 2, 4 or 8.

(6) If a ramp signal is applied to the input, all digital codes appear in the resulting ADC output data.

(7) Gain error is defined as the amount of deviation between the ideal (theoretical) transfer function and the measured transfer function

(with the offset error removed).

(8) Offset error is defined as the output code error for a zero volt input (ideally, output code = 0). For 1 LSB offset, NELCONV must be at least 2.

Revision 1.0

© Semtech

February 2011

Page 7

www.semtech.com

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