87C51 80C51BH 80C31BH
EXTERNAL MEMORY CHARACTERISTICS
All parameter values apply to all devices unless otherwise indicated In this table 87C51 BH refers to
87C51 BH 87C51-1 BH-1 and 87C51-2 BH-2 (Continued)
Symbol
TPXIX
TPXIZ
TAVIV
TPLAZ
TRLRH
TWLWH
TRLDV
TRHDX
TRHDZ
TLLDV
TAVDV
TLLWL
TAVWL
TQVWX
Parameter
Input Instr Hold After PSEN
Input Instr Float After PSEN
87C51 BH
87C51-24 BH-24
Address to Valid Instr In
PSEN Low to Address Float
RD Pulse Width
WR Pulse Width
RD Low to Valid Data In
87C51 BH
87C51-24 BH-24
Data Hold After RD
Data Float After RD
ALE Low to Valid Data In
87C51 BH
87C51-24 BH-24
Address to Valid Data In
87C51 BH
87C51-24 BH-24
ALE Low to RD or WR Low
Address to RD or WR Low
87C51 BH
87C51-24 BH-24
Data Valid to WR Transition
87C51 BH
80C51-24 BH-24
12 MHz
Min Max
0
59
312
10
400
400
252
0
107
517
585
200 300
203
33
Oscillator
24 MHz
Variable
Min Max
Min
Max
0
0
TCLCLb25
21
TCLCLb20
103
5TCLCLb105
10
10
150
6TCLCLb100
150
6TCLCLb100
5TCLCLb165
113
5TCLCLb95
0
0
23
2TCLCLb60
8TCLCLb150
243
8TCLCLb90
9TCLCLb165
285
9TCLCLb90
75 175 3TCLCLb50 3TCLCLa 50
4TCLCLb130
77
4TCLCLb90
TCLCLb50
12
TCLCLb30
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
13