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GTLP16612MTD データシートの表示(PDF) - Fairchild Semiconductor

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GTLP16612MTD
Fairchild
Fairchild Semiconductor 
GTLP16612MTD Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Test Circuits and Timing Waveforms
Test Circuit for A Outputs
Test Circuit for B Outputs
CL includes probes and jig capacitance.
Voltage Waveforms Pulse Duration
(Vm = 1.5V for A-Port and 1.0V for B-Port)
CL includes probes and jig capacitance.
For B-Port outputs, CL = 30 pF is used for
worst case edge rate.
Voltage Waveforms Propagation Delay Times
(A-Port to B-Port)
Voltage Waveforms Setup and Hold Times
(Vm = 1.5V for A-Port and 1.0V for B-Port)
Voltage Waveforms Propagation Delay Times
(B-Port to A-Port)
All input pulses have the following characteristics: frequency = 10 MHz, tr = tf = 2 ns, ZO = 50. The outputs are measured one at a time with
one transition per measurement.
Voltage Waveforms Enable and Disable Times (A-Port)
Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with
internal conditions such that the output is high except when disabled by the output control. All input pulses have the following characteristics: frequency = 10
MHz, tr = tf = 2 ns, ZO = 50. The outputs are measured one at a time with one transition per measurement.
7
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