TLP116
Switching Characteristics
(Unless otherwise specified, Ta=-40 to 100°C,VCC=4.5~5.5V)
TEST
CHARACTERISTIC
SYMBOL CIR-
CUIT
CONDITION
MIN. TYP.
propagation Delay Time
to Logic High output
propagation Delay Time
to Logic Low output
tpHL
tpLH
IF=0→12mA
1
IF=12→0mA
RIN=100Ω
CL=15pF
(Note 4)
—
—
—
—
propagation Delay Time
to Logic High output
propagation Delay Time
to Logic Low output
tpHL
tpLH
VIN=0→5V
RIN=470Ω
(IF=0→8mA)
2
VIN=5→0V
CIN=27pF
CL=15pF
(IF=8→0mA) (Note 4)
—
—
—
—
Switching Time Dispersion
between ON and OFF
|tpHL-
tpLH|
IF=12mA , RIN=100Ω,
CL=15pF (Note 4)
—
—
Output Fall Time(90-10%)
Output Rise Time(10-90%)
tf
1 IF=0→12mA
RIN=100Ω
—
CL=15pF
tr
IF=12→0mA
(Note 4)
—
Common Mode transient
Immunity at High Level
Output
Common Mode transient
Immunity at Low Level
Output
CMH
CML
VCM=1000Vp-p,IF=0mA,
Vo(Min)=4V,Ta=25°C
VCM=1000Vp-p,IF=12mA,
Vo(Max)=0.4V,Ta=25°C
10000
—
-10000 —
*All typical values are at Ta=25°C
Note 4 : CL is approximately 15pF which includes probe and Jig/stray wiring capacitance.
MAX.
60
60
60
60
30
—
—
—
—
UNIT
ns
ns
ns
ns
ns
ns
ns
V/us
V/us
TEST CIRCUIT 1 : tpHL , tpLH
IF=12mA(P.G)
(f=5MHz , duty=50%)
VCC
INPUT
MONITORING
NODE
CL=15pF
SHIELD
RIN=100Ω
GND
0.1uF
Vo
IF
MONITORING
NODE
VCC VO
CL=15pF
1.5V
tpHL
tpLH
50%
VOH
VOL
TEST CIRCUIT 2 : tpHL , tpLH
VIN=5V(P.G) INPUT MONITORING NODE
(f=5MHz , duty=50%)
VCC
CL=15pF
CIN=27pF
SHIELD
RIN=470Ω
GND
0.1uF
Vo
MONITORING
NODE
CL=15pF
VIN
VCC VO
The PROBE and JIG capacitances are included in CL.
(P.G) : Pulse Generatior
tpHL
50%
VOH
1.5V
VOL
tpLH
4
2003-10-21