TSC87C51
PROGRAM
SIGNALS*
CONTROL
SIGNALS*
EA/VPP
ALE/PROG
RST
PSEN
P2.6
P2.7
P3.3
P3.6
P3.7
+5V
VCC
P0.0–P0.7
D0–D7
P1.0–P1.7
P2.0–P2.3
A0–A7
A8–A11
4 to 6 MHz
XTAL1
* See Table 5 for proper value on these inputs
VSS
GND
Figure 6 Set–up modes configuration
Programming algorithm
The Improved Quick Pulse algorithm is based on the Quick Pulse algorithm and decreases the number of pulses applied
during byte programming from 25 to 5.
To program the TSC87C51 the following sequence must be exercised:
D Step 1: Input the valid address on the address lines.
D Step 2: Input the appropriate data on the data lines.
D Step 3: Activate the combination of control signals.
D Step 4: Raise EA/VPP from VCC to VPP (typical 12.75V).
D Step 5: Pulse ALE/PROG 5 times.
Repeat step 1 through 5 changing the address and data for the entire array or until the end of the object file is reached
(see Figure 7).
Verify algorithm
Code array verify must be done after each byte or block of bytes is programmed. In either case, a complete verify of
the programmed array will ensure reliable programming of the TSC87C51.
To verify the TSC87C51 code the following sequence must be exercised :
D Step 1: Activate the combination of program signals.
D Step 2: Input the valid address on the address lines.
D Step 3: Input the appropriate data on the data lines.
D Step 4: Activate the combination of control signals.
Repeat step 2 through 4 changing the address and data for the entire array (see Figure 7).
The encryption array cannot be directly verified. Verification of the encryption array is done by observing that the code
array is well encrypted.
11
Rev. E – July 03, 2000