UPC1857A データシートの表示（PDF） - NEC => Renesas Technology

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UPC1857A

SOUND CONTROL IC WITH SURROUND AND I2C BUS

NEC => Renesas Technology 

µPC1857A

3.1.2 Stop condition

Stop condition is made by SDA rising from “Low” to “High” while SCL is “High” as shown in Figure 3-2.

When this stop condition is received, the µPC1857A stops taking in or outputting data.

Figure 3-2. Start/Stop Condition of Data Transfer

SDA

SCL

3.5 V

1.5 V

4.0 µs

MIN.

3.5 V

Start

1.5 V

4.7 µs

MIN.

Stop

3.1.3 Data transfer

When transferring data, the data must be changed while SCL is “Low” as shown in Figure 3-3. Never change the

data while SCL is “High”.

Figure 3-3. Data Transfer

SDA

SCL

Note 1

Note 2

Notes 1. Data hold time for I2C device: 300 ns MIN., Data hold time for CPU: 5 µs MIN.

2. Data setup time: 250 ns MIN.

Remark Clock frequency: 0 to 100 kHz

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