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UPD178P018A データシートの表示(PDF) - NEC => Renesas Technology

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UPD178P018A
NEC
NEC => Renesas Technology 
UPD178P018A Datasheet PDF : 60 Pages
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µPD178P018A
(2) Non-port pins (2/2)
Pin Name I/O
Function
VPP
— High-voltage applied during program write/verification.
Connected directly to GND in normal operating mode.
After Reset Alternate Function
1.2 Pins in PROM Programming Mode
Pin Name I/O
RESET
Input
VPP
A0 to A16
D0 to D7
CE
OE
PGM
VDD
GND
Input
Input
I/O
Input
Input
Input
Function
PROM programming mode setting
When +5 V or +12.5 V is applied to VPP pin and a low-level signal is applied to the RESET pin, this
chip is set in the PROM programming mode.
PROM programming mode setting and high-voltage applied during program write/verification.
Address bus
Data bus
PROM enable input/program pulse input
Read strobe input to PROM
Program/program inhibit input in PROM programming mode.
Positive power supply
Ground potential
12

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