UPD750066CU(A)-XXX データシートの表示（PDF） - NEC => Renesas Technology

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UPD750066CU(A)-XXX

4 BIT SINGLE CHIP CMOS MICROCOMPUTERS

NEC => Renesas Technology 

µPD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)

2. BLOCK DIAGRAM

Basic interval

timer/watchdog

timer

INTBT

BUZ/P23

TI0/P13

PTO0/P20

TI1/P12/INT2

PTO1/P21

SI/SB1/P03

SO/SB0/P02

SCK/P01

Watch timer

INTW INTW

INTT0

8-bit

timer/

event

counter#0

8-bit

timer/

event

counter#1

Cascaded

16-bit

timer/

event

counter

INTT1

Clocked serial

interface

INT0/P10

INT1/P11

INT4/P00

INT2/P12/TI1

KR0/P60 to

KR3/P63

4

INTCSI TOUT0

Interrupt

control

AN0/P110 to

AN3/P113

4

AN4/P60 to

AN7/P63

4

AVREF

AVSS

A/D converter

SP (8)

ALU

CY

Program counter

SBS

BANK

Program

memoryNote

(ROM)

General reg.

Data memory

(RAM)

512 × 4 bits

Port 0 4 P00 to P03

Port 1 4 P10 to P13

Port 2 4 P20 to P23

Port 3 4 P30 to P33

Port 4 4 P40 to P43

Port 5 4 P50 to P53

Port 6 4 P60 to P63

Port 11 4 P110 to P113

Decode

and

control

Bit seq. buffer (16)

Clock

output

control

fx/2N

CPU Clock Φ

Clock

divider

System clock

generator

Sub Main

Stand by

control

PCL/P22

XT1 XT2 X1 X2

IC VDD VSS RESET

Note The ROM capacity varies depending on the product.

Data Sheet U10165EJ2V0DS00

7

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