WM2636ID データシートの表示（PDF） - Wolfson Microelectronics plc

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WM2636ID

12-bit Serial Input Voltage Output DAC with Internal Reference

Wolfson Microelectronics plc 

WM2636

SERIAL INTERFACE

*

tWL

tWH

SCLK

1

tSUD

tHD

DIN

D15

tSUCSFS

NCS

tWHFS

tSUFS

2

D14

3

D13

FS

Production Data

4

5 15

16

D12

D1

D0

tSUC16CS

tSUC16FS

Figure 1 Timing Diagram

Test Conditions:

RL = 10kΩ, CL = 100pF. VDD = 5V ± 10%, VREF = 2.048V and VDD = 3V ± 10%, VREF = 1.024V over recommended operating

free-air temperature range (unless noted otherwise).

SYMBOL TEST CONDITIONS

MIN

TYP

MAX

UNIT

tSUCSFS

Setup time NCS low before negative FS edge.

10

ns

tSUFS

Setup time FS low before first negative SCLK edge.

8

ns

Setup time, sixteenth negative edge after FS low on

tSUC16FS

which D0 is sampled before rising edge of FS.

10

ns

Setup time, sixteenth positive SCLK edge (first

positive after D0 sampled) before NCS rising edge. If

tSUC16CS

FS is used instead of the sixteenth positive edge to

update the DAC, then the setup time is between the

FS rising edge and the NCS rising edge.

10

ns

tWH

Pulse duration, SCLK high.

25

ns

tWL

Pulse duration, SCLK low.

25

ns

tSUD

Setup time, data ready before SCLK falling edge.

8

ns

tHD

Hold time, data held valid after SCLK falling edge.

5

ns

tWHFS

Pulse duration, FS high.

20

ns

WOLFSON MICROELECTRONICS LTD

PD Rev 1.0 July 1999

5

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