LTC1439(RevA) データシートの表示（PDF） - Linear Technology

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LTC1439
(Rev.:RevA)

Dual High Efficiency, Low Noise, Synchronous Step-Down Switching Regulators

Linear Technology 

LTC1438/LTC1439

APPLICATIONS INFORMATION

CLP holds the voltage. The LTC1439 PLLIN pin must be

driven from a low impedance such as a logic gate located

close to the pin. Any external attenuator used needs to be

referenced to SGND.

The loop filter components CLP, RLP smooth out the

current pulses from the phase detector and provide a

stable input to the voltage-controlled oscillator. The filter

components CLP and RLP determine how fast the loop

acquires lock. Typically, RLP =10k and CLP is 0.01µF to 0.1µF.

The low side of the filter needs to be connected to SGND.

The PLL LPF pin can be driven with external logic to obtain

a 1:1.9 frequency shift. The circuit shown in Figure 9 will

provide a frequency shift from fO to 1.9fO as the voltage on

VPLLLPF increases from OV to 2.4V. Do not exceed 2.4V on

VPLLLPF.

2.4V

MAX

PLL LPF

18k

3.3V OR 5V

LTC1435 • F09

Figure 9. Directly Driving PLL LPF Pin

Low-Battery Comparator

The LTC1438/LTC1439 have an on-chip low-battery com-

parator which can be used to sense a low-battery condi-

tion when implemented as shown in Figure 10. The resistor

divider R3/R4 sets the comparator trip point as follows:

VLBITRIP = 1.19V1+ RR43

The divided down voltage at the negative (–) input to the

comparator is compared to an internal 1.19V reference. A

20mV hysteresis is built in to assure rapid switching. The

output is an open drain MOSFET and requires a pull-up

resistor. This comparator is not active when both the

RUN/SS1 and RUN/SS2 pins are low. Refer to the LTC1538/

LTC1539 for a comparator which is active during shutdown.

The low side of the resistive divider needs to be connected to

SGND.

VIN

SGND

R4

LTC1438/LTC1439 LBO

LBI –

R3

+

1.19V REFERENCE

1438 F10

Figure 10. Low-Battery Comparator

SFB1 Pin Operation

When the SFB1 pin drops below its ground referenced

1.19V threshold, continuous mode operation is forced. In

continuous mode, the large N-channel main and synchro-

nous switches are used regardless of the load on the main

output.

In addition to providing a logic input to force continuous

synchronous operation, the SFB1 pin provides a means to

regulate a flyback winding output. The use of a synchro-

nous switch removes the requirement that power must be

drawn from the inductor primary in order to extract power

from the auxiliary winding. With the loop in continuous

mode, the auxiliary output may be loaded without regard

to the primary output load. The SFB1 pin provides a way

to force continuous synchronous operation as needed by

the flyback winding.

The secondary output voltage is set by the turns ratio of

the transformer in conjunction with a pair of external

resistors returned to the SFB1 pin as shown in Figure 4a.

The secondary regulated voltage VSEC in Figure 4a is given

by:

VSEC ≈ (N + 1)VOUT > 1.19V 1+ RR65

where N is the turns ratio of the transformer, and VOUT is

the main output voltage sensed by Sense– 1.

Auxiliary Regulator/Comparator

The auxiliary regulator/comparator can be used as a

comparator or low dropout regulator (by adding an exter-

nal PNP pass device).

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