HEF4016B データシートの表示（PDF） - NXP Semiconductors.

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HEF4016B

Quadruple bilateral switches

NXP Semiconductors. 

Philips Semiconductors

Quadruple bilateral switches

Product specification

HEF4016B

gates

Notes

Vis is the input voltage at a Y or Z terminal, whichever is assigned as input.

Vos is the output voltage at a Y or Z terminal, whichever is assigned as output.

1. RL = 10 kΩ to VSS; CL = 50 pF to VSS; En = VDD; Vis = VDD (square-wave); see Figs 6 and 10.

2. RL = 10 kΩ; CL = 50 pF to VSS; En = VDD (square-wave);

Vis = VDD and RL to VSS for tPHZ and tPZH;

Vis = VSS and RL to VDD for tPLZ and tPZL; see Figs 6 and 11.

3. RL = 10 kΩ; CL = 15 pF; En = VDD; Vis = 1⁄2VDD(p-p) (sine-wave, symmetrical about 1⁄2VDD);

fis = 1 kHz; see Fig.7.

4. RL = 1 kΩ; Vis = 1⁄2VDD(p-p) (sine-wave, symmetrical about 1⁄2VDD);

20 log V-V----o-i-s-s---(-(-A-B---)-)= –50 dB; En (A)= VSS; En (B) = VDD; see Fig. 8.

5. RL = 10 kΩ to VSS; CL = 15 pF to VSS; En = VDD (square-wave); crosstalk is  Vos (peak value);

see Fig.6.

6. RL = 1 kΩ; CL = 5 pF; En = VSS; Vis = 1⁄2VDD(p-p) (sine-wave, symmetrical about 1⁄2VDD);

20 log -VV----oi--s-s= –50 dB; see Fig. 7.

7. RL = 1 kΩ; CL = 5 pF; En = VDD; Vis = 1⁄2VDD(p-p) (sine-wave, symmetrical about 1⁄2VDD);

20 log -VV----o-i-s-s = –3 dB; see Fig. 7.

VDD

V

Dynamic power

5

dissipation per

10

package (P)(1)

15

Note

1. All enable inputs switching.

TYPICAL FORMULA FOR P (µW)

550 fi + ∑ (foCL) × VDD2

2 600 fi + ∑ (foCL) × VDD2

6 500 fi + ∑ (foCL) × VDD2

where

fi = input freq. (MHz)

fo = output freq. (MHz)

CL = load capacitance (pF)

∑ (foCL) = sum of outputs

VDD = supply voltage (V)

January 1995

6

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