EMIF01-10005W5 データシートの表示（PDF） - STMicroelectronics

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EMIF01-10005W5

EMI FILTER INCLUDING ESD PROTECTION

STMicroelectronics 

EMIF01-10005W5

ESD PROTECTION

In addition to its filtering function, the EMIF01-10005W5 is particularly optimized to perform ESD protection.

ESD protection is based on the use of device which clamps at :

VCL = VBR + Rd.IPP

This protection function is splitted in 2 stages. As shown in figure A3, the ESD strikes are clamped by the first stage S1 and

then its remaining overvoltage is applied to the second stage through the resistor R. Such a configuration makes the output

voltage very low at the Vout level.

Fig A3 : ESD clamping behavior

Rg

R

ESD

Surge

Vg

Rd

Vin

Vbr

Rd

Vout

Vbr

Rload

S1

S2

EMIF01-10005W5

Device to be protected

To have a good approximation of the remaining voltages at both Vin and Vout stages, we provide the typical dynamical

resistance value Rd. By taking into account these following hypothesis : R>>Rd, RG>>Rd and Rload>>Rd, it gives these

formulas:

Vin

=

Rg.Vbr+Rd.Vg

Rg

Vout

=

R.Vbr+Rd.Vin

R

The results of the calculation done for VG=8kV, RG=330Ω (IEC1000-4-2 standard) and VBR=7V (typ.) give:

Vin = 31.2 V

Vout = 7.3 V

This confirms the very low remaining voltage across the device to be protected. It is also important to note that in this

approximation the parasitic inductance effect was not taken into account. This could be few tenths of volts during few ns at

the Vin side. This parasitic effect is not present at the Vout side due the low current involved after the resistance R.

Fig A4 : Measurement conditions

ESD

SURGE

TEST BOARD

16kV

Air

Discharge

Vin

Vout

4/10

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