CXD9450 データシートの表示（PDF） - Unspecified

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CXD9450

Single-Chip FaxEngine Product Family

Unspecified 

Single-Chip FaxEngine and Integrated Analog Device

Single-Chip FaxEngine Product Family

Table 1. CXD9450 176-Pin TQFP Assignments

Pin

Signal Label

1

VSS

2

D[3]

3

D[2]

4

D[1]

5

D[0]

6

A[23]/EYEXY

7

A[22]/EYESYNC

8

A[21]/EYECLK

9

A[20]

10 A[19]

11 A[18]

12 VDD

13 A[17]

14 A[16]

15 A[15]

16 A[14]

17 VSS

18 A[13]

19 A[12]

20 A[11]

21 A[10]

22 A[9]

23 A[8]

24 A[7]

25 A[6]

26 A[5]

27 A[4]

28 VDD

29 A[3]

30 A[2]

31 A[1]

32 A[0]

33 GPIO[20]/ALTTONE

34 NC

35 NC

36 NC

37 NC

38 NC

39 GPIO[19]/RDY/SEROUT

40 GPIO[11]/BE/SERINP

41 VSS

42 PCLK/DMAACK

43 PDAT

44 PLAT

I/O

—

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

—

I/O

I/O

I/O

I/O

—

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

I/O

—

I/O

I/O

I/O

I/O

I/O

—

—

—

—

—

I/O

I/O

—

O

O

O

Input

Type

—

Tu

Tu

Tu

Tu

Tu

Tu

Tu

Tu

Tu

Tu

—

Tu

Tu

Tu

Tu

—

Tu

Tu

Tu

Tu

Tu

Tu

Tu

Tu

Tu

Tu

—

Tu

Tu

Tu

Tu

Hu

—

—

—

—

—

Hu

Hu

—

—

—

—

Output

Type

—

13Xs

13Xs

13Xs

13Xs

13Xs

13Xs

13Xs

13Xs

13Xs

13Xs

—

13Xs

13Xs

13Xs

13Xs

—

13Xs

13Xs

13Xs

13Xs

13Xs

13Xs

13Xs

13Xs

13Xs

13Xs

—

13Xs

13Xs

13Xs

13Xs

13Xs

—

—

—

—

—

13Xs

13Xs

—

3XC

2XC

3XC

Pin Description

VSSi

CPU Data Bus

CPU Data Bus

CPU Data Bus

CPU Data Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

VDDo

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

VSSo

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

VDDi

CPU Address Bus

CPU Address Bus

CPU Address Bus

CPU Address Bus

—

Reserved

Reserved

Reserved

Reserved

Reserved

—

—

VSSi

—

—

—

100544C

Conexant

9

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