LTC5800-IPR データシートの表示（PDF） - Linear Technology

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LTC5800-IPR

2.4 GHz 802.15.4 Eterna ™ Embedded Network Manager-on-Chip

Linear Technology 

Advanced Information

4.0 Operation

In order to provide capabilities and flexibility in addition to ultra low power, Eterna operates in various states, as shown in

Figure 8 and described in this section.

Power-On

Reset

VSUPPLY > PoR

RESETn low and

FLASH_P_ENn low

Load Fuse

Settings

RESETn low and

FLASH_P_ENn high

Reset

Set RESETn high and

FLASH_P_EN high

for 125 µs, then

set RESETn low

Serial Flash

Emulation

Start Up

De-assert RESETn

Boot

Assert RESETn

Assert RESETn

Assert RESETn

Doze

CPU and peripherals

inactive

Active

Deep Sleep

HW or PMU Event

Operation

lowPowerSleep

Command

Inactive

Figure 8 State Diagram – Operating Modes

4.1

Start Up

Start Up occurs as a result of either tripping of the power-on-reset circuit or the assertion of RESETn. After the completion

of power-on-reset (see Section 2.1.1) or the falling edge of an internally synchronized RESETn, Eterna loads its Fuse Table

(see section 4.1.1), including setting I/O direction. In this state, Eterna checks the state of the FLASH_P_ENn and RESETn

and enters the serial flash emulation mode, if both signals are asserted. If the FLASH_P_ENn pin is not asserted but RESETn

is not asserted, Eterna automatically reduces its energy consumption to a minimum until RESETn is released. Once RESETn is de-

asserted, Eterna goes through a boot sequence, and then enters the Active state.

4.1.1

Fuse Table

Eterna’s Fuse Table is a 2 KB page in flash that contains two data structures, one for hardware configuration immediately

following Power on Reset or the assertion of RESETn and one for configuration of design specific parameters. Hardware

support for configuration includes configuration of I/O, preventing I/O leakage from negatively affecting current

consumption during power on, which can be a significant issue for current limited supplies. Examples of design-specific

parameters include setting of UART modes, clock sources and trim values. Fuse Tables are created via the Fuse Table

application software described in 040-0109 Design Specific Configuration Guide. Fuse Tables are loaded into flash using the

same software and in-circuit programmer used to load Eterna’s networking software image – see the 040-0110 Eterna Serial

Programmer Guide for details.

10

Linear Technology / Dust Networks

Eterna Datasheet

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