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M62392P データシートの表示(PDF) - Renesas Electronics

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M62392P Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
M62392P/FP
Preliminary
I2C BUS Line Characteristics
Normal Mode
Item
Symbol
Min
Max
Unit
SCL clock frequency
Time the bus must be free before a new transmission can start
Hold time START condition.
After this period, the first clock pulse is generated.
fSCL
0
100
kHz
tBUF
4.7
s
tHD : STA
4.0
s
Low period of the clock
High period of the clock
Setup time for START condition
(only relevant for a repeated START condition)
tLOW
4.7
s
tHIGH
4.0
s
tSU : STA
4.7
s
Hold time DATA
tHD : DAT
0
s
Setup time DATA
tSU : DAT
250
ns
Rise time of both SDA and SCL lines
tR
1000
ns
Fall time of both SDA and SCL lines
Setup time for STOP condition
tF
300
ns
tSU : STO
4.0
s
Note: Transmitter must internally provide at least a hold time to bridge the undefined region (300 ns Max) of the falling
edge of SCL.
Timing Chart
tR, tF
tBUF
VIH
SDA
VIL
tHD:STA
tSU:DAT
tHD:DAT
tSU:STA
tSU:STO
VIH
SCL
VIL
Start
tLOW
tHIGH
Start
Stop
Start
R03DS0045EJ0400 Rev.4.00
Jun 03, 2011
Page 4 of 8

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