UC3844, 45 UC2844, 45
Figure 24. MOSFET Parasitic Oscillations
VCC
7(12)
Vin
5.0Vref
+
+–
–
+
–+
–
T
S
–+
RQ
Comp/Latch
7(11)
Rg
Q1
6(10)
5(8)
3(5)
RS
Series gate resistor Rg will damp any high frequency parasitic oscillations
caused by the MOSFET input capacitance and any series wiring inductance
in the gate–source circuit.
Figure 25. Bipolar Transistor Drive
IB
Vin
+
0
Base Charge
Removal
–
C1
Q1
6(1)
5(8)
3(5)
RS
The totem–pole output can furnish negative base current for enhanced
transistor turn–off, with the addition of capacitor C1.
Figure 26. Isolated MOSFET Drive
VCC
Vin
7(12)
5.0Vref
+– +
+ +–
–
–
T
S
–+ RQ
Comp/Latch
Isolation
Boundary
7(11)
6(10)
5(8)
R
VGS Waveforms
Q1
+
ÉÉ ÉÉ 0
–
É ÉÉ 50%DC
+
0
–
25% DC
Ipk =
V(pin 1) – 1.4
3 RS
NP
NS
3(5) C
RS NS
Np
Figure 27. Latched Shutdown
MCR
2N
101
3905
8(14)
4(7)
2(3)
1(1)
2N
3903
R
Bias
R
Osc
+
+–
EA
1.0mA
2R
R
5(9)
The MCR101 SCR must be selected for a holding of less than 0.5 mA at
TA(min). The simple two transistor circuit can be used in place of the SCR as
shown. All resistors are 10 k.
Figure 28. Error Amplifier Compensation
From VO
Ri
Rd CI
Rf ≥ 8.8 k
2.5V +
2(3)
+
1.0mA
–
Rf
EA
2R
R
1(1)
5(9)
Error Amp compensation circuit for stabilizing any current–mode topology except
for boost and flyback converters operating with continuous inductor current.
From VO
Rp Ri
Cp
Rd CI
2.5V +
2(3)
+
1.0mA
Rf
–
EA
2R
R
1(1)
5(9)
Error Amp compensation circuit for stabilizing current–mode boost and flyback
topologies operating with continuous inductor current.
MOTOROLA ANALOG IC DEVICE DATA
11