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UPD16855BG データシートの表示(PDF) - NEC => Renesas Technology

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UPD16855BG
NEC
NEC => Renesas Technology 
UPD16855BG Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
BLOCK DIAGRAM
OUT1 8
(Output1)
Ref.
Voltage
Over Current
Detect
FLG1 2
(Flag Out1)
IN (Input)
7
Gate
Control
Gate
Control
UVLO
µPD16855
5 OUT2
(Output2)
Ref.
Voltage
Over Current
Detect
3 FLG2
(Flag Out2)
Thermal
Shutdown
6
GND
1
CTL1
(Control Input1)
4
CTL2
(Control Input2)
Note The internal resister doesn’t connect to input terminal of CTL1 (1 pin) and CTL2 (4 pin).
Therefore the input level must be “H” or “L” even if these pins aren’t used.
2
Data Sheet S13020EJ1V0DS00

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