M95128-RMN1 データシートの表示（PDF） - STMicroelectronics

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M95128-RMN1

256/128 Kbit Serial SPI Bus EEPROM With High Speed Clock

STMicroelectronics 

Figure 5. Hold Condition Activation

CLOCK

HOLD PIN

MEMORY

STATUS

ACTIVE

HOLD

ACTIVE

Figure 6. Block Diagram

HOLD

W

S

C

D

Q

Control Logic

I/O Shift Register

High Voltage

Generator

Address Register

and Counter

Data

Register

An - 63

M95256, M95128

HOLD

ACTIVE

AI02029B

Status

Register

An

Size of the

Read only

area of the

EEPROM

0000h

64 Bytes

X Decoder

003Fh

Note: 1. The cell An represents the byte at the highest address in the memory

AI02030B

5/21

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