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IDT70T631S10BCI データシートの表示(PDF) - Integrated Device Technology

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IDT70T631S10BCI Datasheet PDF : 27 Pages
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IDT70T633/1S
High-Speed 2.5V 512/256K x 18 Asynchronous Dual-Port Static RAM
Preliminary
Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (VDD = 2.5V ± 100mV)
70T633/1S
Symbol
Parameter
Test Conditions
|ILI|
Input Leakage Current(1)
VDDQ = Max., VIN = 0V to VDDQ
|ILI|
JTAG & ZZ Input Leakage Current(1,2) VDD = Max., VIN = 0V to VDD
|ILO|
Output Leakage Current(1,3)
CE0 = VIH or CE1 = VIL, VOUT = 0V to VDDQ
VOL (3.3V) Output Low Voltage(1)
IOL = +4mA, VDDQ = Min.
VOH (3.3V) Output High Voltage(1)
IOH = -4mA, VDDQ = Min.
VOL (2.5V) Output Low Voltage(1)
IOL = +2mA, VDDQ = Min.
VOH (2.5V) Output High Voltage(1)
IOH = -2mA, VDDQ = Min.
NOTES:
1. VDDQ is selectable (3.3V/2.5V) via OPT pins. Refer to page 6 for details.
2. Applicable only for TMS, TDI and TRST inputs.
3. Outputs tested in tri-state mode.
Min.
___
___
___
___
2.4
___
2.0
Max.
10
+30
10
0.4
___
0.4
___
Unit
µA
µA
µA
V
V
V
V
5670 tbl 09
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (VDD = 2.5V ± 100mV)
70T633/1S8(6) 70T633/1S10 70T633/1S12
Com'l Only
Com'l
& Ind(6)
Com'l
& Ind
70T633/1S15
Com'l Only
Symbol
Parameter
Test Condition
Version Typ.(4) Max. Typ.(4) Max. Typ.(4) Max. Typ.(4) Max. Unit
IDD Dynamic Operating CEL and CER= VIL,
Current (Both
Outputs Disabled
Ports Active)
f = fMAX(1)
COM'L S 350 475 300 405 300 355 225 305 mA
IND
S
____
____
300
445
300
395
____
____
ISB1(6)
Standby Current
(Both Ports - TTL
Level Inputs)
CEL = CER = VIH
f = fMAX(1)
COM'L S 115 140 90
120 75 105 60
85 mA
IND
S
____
____
90
145
75
130
____
____
ISB2(6)
Standby Current
(One Port - TTL
Level Inputs)
CE"A" = VIL and CE"B" = VIH(5)
Active Port Outputs Disabled,
f = fMAX(1)
COM'L S 240 315 200 265 180 230 150 200 mA
IND
S
____
____
200
290
180
255
____
____
ISB3 Full Standby Current Both Ports CEL and
COM'L S 2
10
2
10
2
10
2
10 mA
(Both Ports - CMOS CER > VDD - 0.2V, VIN > VDD - 0.2V
Level Inputs)
or VIN < 0.2V, f = 0(2)
IND
S
____
____
2
20
2
20
____
____
ISB4(6) Full Standby Current CE"A" < 0.2V and CE"B" > VDD - 0.2V(5) COM'L S 240
315
200
265
180
230
150
200 mA
(One Port - CMOS VIN > VDD - 0.2V or VIN < 0.2V, Active
Level Inputs)
Port, Outputs Disabled, f = fMAX(1)
IND
S
____
____
200
290
180
255
____
____
IZZ Sleep Mode Current ZZL = ZZR = VIH
(Both Ports - TTL
f = fMAX(1)
Level Inputs)
COM'L S 2
10
2
10
2
10
2
10 mA
IND
S
____
____
2
20
2
20
____
____
NOTES:
5670 tbl 10
1. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC, using "AC TEST CONDITIONS".
2. f = 0 means no address or control lines change. Applies only to input at CMOS level standby.
3. VDD = 2.5V, TA = 25°C for Typ. values, and are not production tested. IDD DC(f=0) = 100mA (Typ).
4. CEX = VIL means CE0X = VIL and CE1X = VIH
CEX = VIH means CE0X = VIH or CE1X = VIL
CEX < 0.2V means CE0X < 0.2V and CE1X > VDDQX - 0.2V
CEX > VDDQX - 0.2V means CE0X > VDDQX - 0.2V or CE1X - 0.2V
"X" represents "L" for left port or "R" for right port.
5. ISB1, ISB2 and ISB4 will all reach full standby levels (ISB3) on the appropriate port(s) if ZZL and /or ZZR = VIH.
6. 8ns Commercial and 10ns Industrial speed grades are available in BF-208 and BC-256 packages only.
9

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