HI5810
Absolute Maximum Ratings
Supply Voltage
VDD to VSS . . . . . . . . . . . . . . . . . . . . (VSS -0.5V) < VDD < +6.5V
VAA+ to VAA- . . . . . . . . . . . . . . . . . . . (VSS -0.5V) to (VSS +6.5V)
VAA+ to VDD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3V
Analog and Reference Inputs
VIN, VREF+, VREF - . . . . . . . . (VSS -0.3V) < VINA < (VDD +0.3V)
Digital I/O Pins . . . . . . . . . . . . . . . (VSS -0.3V) < VI/O < (VDD +0.3V)
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
75
Maximum Junction Temperature
Plastic Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
Maximum Lead Temperature (Soldering, 10s). . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
VDD = VAA+ = 5V, VREF+ = +4.608V, VSS = VAA- = VREF - = GND, CLK = External 1.5MHz,
Unless Otherwise Specified
25oC
-40oC TO 85oC
PARAMETER
ACCURACY
Resolution
Integral Linearity Error, INL (End Point)
Differential Linearity Error, DNL
Gain Error, FSE (Adjustable to Zero)
Offset Error, VOS (Adjustable to Zero)
DYNAMIC CHARACTERISTICS
Signal to Noise Ratio, SINAD
RMS Signal
RMS Noise + Distortion
Signal to Noise Ratio, SNR
RMS Signal
RMS Noise
Total Harmonic Distortion, THD
Spurious Free Dynamic Range, SFDR
ANALOG INPUT
Input Current, Dynamic
Input Current, Static
Input Bandwidth -3dB
Reference Input Current
Input Series Resistance, RS
Input Capacitance, CSAMPLE
Input Capacitance, CHOLD
TEST CONDITIONS
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
fS = Internal Clock, fIN = 1kHz
fS = 1.5MHz, fIN = 1kHz
At VIN = VREF+, 0V
Conversion Stopped
In Series with Input CSAMPLE
During Sample State
During Hold State
MIN TYP MAX MIN
MAX
12
-
-
12
-
-
-
±2.5
-
±2.5
-
-
±2.0
-
±2.0
-
-
±3.5
-
±3.5
-
-
±2.5
-
±2.5
-
68.8
-
-
-
62.1
-
70.5
-
-
-
63.2
-
-73.9
-
-
-
-68.4
-
75.4
-
-
-
69.2
-
±125 ±150
-
-
±0.6 ±10
-
-
1
-
-
-
160
-
-
-
420
-
-
-
380
-
-
-
20
-
-
±150
±10
-
-
-
-
-
UNITS
Bits
LSB
LSB
LSB
LSB
dB
dB
dB
dB
dBc
dBc
dB
dB
µA
µA
MHz
µA
W
pF
pF
3