Low-Power, Serial, 12-Bit DACs with
Force/Sense Voltage Output
ELECTRICAL CHARACTERISTICS—MAX5175 (continued)
(VDD = +5V ±10%, VREF = 2.5V, AGND = DGND, FB = OUT, RL = 5kΩ, CL = 100pF referenced to ground, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
SR
Output Settling Time
To ±0.5LSB, from 10mV to full-scale
Output Voltage Swing (Note 3)
Current into FB
Time Required to Exit Shutdown
Digital Feedthrough
POWER SUPPLIES
CS = VDD; fSCLK = 100kHz, VSCLK = 5Vp-p
Positive Supply Voltage
VDD
Power-Supply Current (Note 4)
IDD
Shutdown Current (Note 4)
TIMING CHARACTERISTICS
SCLK Clock Period
SCLK Pulse Width High
SCLK Pulse Width Low
CS Fall to SCLK Rise Setup
Time
tCP
tCH
tCL
tCSS
SCLK Rise to CS Rise Hold
Time
tCSH
SDI Setup Time
tDS
SDI Hold Time
tDH
SCLK Rise to DOUT Valid
Propagation Delay
tDO1 CLOAD = 200pF
MIN TYP MAX UNITS
0.6
V/µs
12
µs
0
VDD
V
-0.1
0
0.1
µA
40
µs
1
nV-s
4.5
5.5
V
0.26 0.35 mA
1
10
µA
100
ns
40
ns
40
ns
40
ns
0
ns
40
ns
0
ns
80
ns
SCLK Fall to DOUT Valid
Propagation Delay
SCLK Rise to CS Fall Delay
CS Rise to SCLK Rise Hold Time
CS Pulse Width High
tDO2
tCS0
tCS1
tCSW
CLOAD = 200pF
80
ns
10
ns
40
ns
100
ns
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