MAX5170(1999) データシートの表示（PDF） - Maxim Integrated

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MAX5170
(Rev.:1999)

Low-Power, Serial, 14-Bit DACs ith Voltage Output

Maxim Integrated 

Low-Power, Serial, 14-Bit DACs

with Voltage Output

ELECTRICAL CHARACTERISTICS—MAX5172 (continued)

(VDD = 2.7V to 3.6V, VREF = 1.25V, OS = AGND = DGND, RL = 5kΩ, CL = 100pF referenced to ground, TA = TMIN to TMAX, unless

otherwise noted. Typical values are at TA = +25°C).

PARAMETER

SYMBOL

CONDITIONS

MIN TYP MAX UNITS

DYNAMIC PERFORMANCE

Voltage Output Slew Rate

SR

0.6

V/µs

Output Settling Time

To ±0.5LSB from 10mV to full-scale

18

µs

Output Voltage Swing (Note 3)

OS Pin Input Resistance

Time Required to Exit Shutdown

Digital Feedthrough

POWER SUPPLIES

Positive Supply Voltage

Power-Supply Current (Note 4)

Shutdown Current (Note 4)

TIMING CHARACTERISTICS

SCLK Clock Period

SCLK Pulse Width High

SCLK Pulse Width Low

CSB Fall to SCLK Rise Setup

Time

SCLK Rise to CS Rise Hold

Time

SDI Setup Time

SDI Hold Time

SCLK Rise to DOUT Valid

Propagation Delay

SCLK Fall to DOUT Valid

Propagation Delay

SCLK Rise to CS Fall Delay

VDD

IDD

tCP

tCH

tCL

tCSS

tCSH

tDS

tDH

tDO1

tDO2

tCS0

CS = VDD, fSCLK = 100kHz, VSCLK = 3Vp-p

CLOAD = 200pF

CLOAD = 200pF

0

VDD

V

80

120

kΩ

40

µs

1

nV-s

2.7

3.6

V

0.28

0.4

mA

1

10

µA

150

ns

75

ns

75

ns

60

ns

0

ns

60

ns

0

ns

200

ns

200

ns

10

ns

CS Rise to SCLK Rise Hold Time tCS1

75

ns

CS Pulse Width High

tCSW

150

ns

Note 1: INL guaranteed between codes 40 and 16383.

Note 2: Offset is measured at the code that comes closest to 10mV.

Note 3: Accuracy is better than 1.0 LSB for VOUT = 10mV to VDD - 180mV. Guaranteed by PSR test on end points.

Note 4: RL = open and digital inputs are either VDD or DGND.

Note 5: INL guaranteed between codes 80 and 16383.

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