SiHG16N50C
Vishay Siliconix
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0.5
0.2
0.1
0.1
0.05
0.02
0.01
10-4
Single Pulse
(Thermal Response)
10-3
10-2
t1, Rectangular Pulse Duration (s)
PDM
t1
t2
Notes:
1. Duty Factor, D = t1/t2
2. Peak Tj = PDM x ZthJC + TC
0.1
1
Fig. 10 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
15 V
VDS
L
Driver
RG
20 V
tp
D.U.T.
IAS
0.01 Ω
+
- VDAD A
Fig. 11a - Unclamped Inductive Test Circuit
V DS
tp
IAS
Fig. 11b - Unclamped Inductive Waveforms
VGS
QGS
VG
QG
QGD
Charge
Fig. 12a - Basic Gate Charge Waveform
Current regulator
Same type as D.U.T.
12 V
50 kΩ
0.2 µF
0.3 µF
D.U.T.
+
-VDS
VGS
3 mA
IG
ID
Current sampling resistors
Fig. 12b - Gate Charge Test Circuit
Document Number: 91418
S10-1355-Rev. A, 14-Jun-10
www.vishay.com
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