5962-8302401EA データシートの表示（PDF） - Avago Technologies
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5962-8302401EA Datasheet PDF : 12 Pages
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PULSE GEN.
ZO = 50
tr, tf = 50 ns
f = 100 Hz IF
tPULSE = 0.5ms
1
IF MONITOR
2
Rm 3
4
RCC *
8
7
56
1.0 F
+5 V
RL
VO
6
CL**
5
* SEE NOTE 11
** CL INCLUDES PROBE AND STRAY WIRING CAPACITANCE.
IF
B
1
A
2
RCC *
8
7
56
1.0 F
+5 V
RL
VO
VFF
* SEE NOTE 11
3
6
4
5
+ V–CM
PULSE GEN.
Figure 8. Switching Test Circuit (f, tP not JEDEC registered).
VCC
R1
ILEAK R2
R2
≥
2.4
IF
VF
1
8
2
7
R1
≤
VCC VF IF
IF + ILEAK
R2
3
6
4
5
Figure 9. Test Circuit for Transient Immunity and Typical Waveforms.
R2 MAY BE OMITTED
IF ADDITIONAL FANOUT
IS NOT USED.
Figure 10. Recommended Drive Circuitry Using TTL Open-Collector Logic.
11
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