UPD78C12AL データシートの表示（PDF） - NEC => Renesas Technology
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UPD78C12AL Datasheet PDF : 66 Pages
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µPD78C10A,78C11A,78C12A
2. DIFFERENCES BETWEEN µPD78C10A AND µPD78C11A, 78C12A
The difference between the µPD78C10A and µPD78C11A, 78C12A is whether or not there is an on-chip mask
programmable ROM. The memory map differs accordingly as described below.
(1) µPD78C10A
Since the µPD78C10A does not have an on-chip ROM, all memory, except the on-chip RAM area (addresses FF00H
to FFFFH) can be installed outside. The size of this external memory can be selected from among 4K bytes (0000H
to 0FFFH), 16K bytes (0000H to 3FFFH), and 64K bytes (0000H to FEFFH) by MODE0 and MODE1 pin setting as shown
in the following table and Fig. 2-1.
Control Pin
Operation Mode
MODE1 MODE0
4K bytes access
0
0
16K bytes access 0
1
64K bytes access 1
1
External Memory
4K bytes (address 0000H to 0FFFH)
16K bytes (address 0000H to 3FFFH)
64K bytes (address 0000H to FEFFH)
On-Chip RAM
Address FF00H to FFFFH
Address FF00H to FFFFH
Address FF00H to FFFFH
External memory is accessed by using PD7 to PD0 (multiplexed address/data bus), PF7 to PF0 (address bus), and
the RD, WR, and ALE signals. When 4K-byte or 16K-byte external memory is accessed PF7 to PF0 not used as address
lines can be used as general purpose input/output ports.
The size of external memory can be specified by MODE0 and MODE1 pin setting. Preset each bit of MEMORY
MAPPING reisters MM2, MM1, and MM0 to "0".
(2) µPD78C11A and 78C12A
The µPD78C11A has an on-chip mask programmable ROM at addresses 0000H to 0FFFH and RAM at addresses
FF00H to FFFFH. Externally, memory can be extended up to 60K bytes (addresses 1000H to FEFFH) in steps. The
µPD78C12A has an on-chip mask programmable ROM at address 0000H to 1FFFH and RAM at address FF00H to
FFFFH. Externally, memory can be extended up to 56K bytes (address 2000H to FEFFH) in steps. The size of the
external extension memory can be selected from among no external memory, 256 bytes, 4K bytes, 16K bytes, and
56K/60K bytes* by MEMORY MAPPING register setting. External memory can be accessed by using PD7 to PD0
(multiplexed address/data bus), PF7 to PF0 (address bus), and the RD, WR, and ALE signals. Programs and data
can be stored in external memory. PF7 to PF0 become address lines corresponding to the size of external memory.
The remaining pins can be used as general purpose input/output ports.
PF7
Port
Port
Port
AB15
PF6
Port
Port
Port
AB14
PF5
Port
Port
AB13
AB13
PF4
Port
Port
AB12
AB12
PF3
Port
AB11
AB11
AB11
PF2
Port
AB10
AB10
AB10
* µPD78C11A: 60K bytes, µPD78C12A: 56K bytes
PF1
Port
AB9
AB9
AB9
PF0
External Memory
Port Maximam 256 bytes
AB8 Maximum 4K bytes
AB8 Maximum 16K bytes
AB8 Maximum 56K/60K bytes*
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