SI8610 データシートの表示（PDF） - Silicon Laboratories

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SI8610

LOW-POWER SINGLE AND DUAL-CHANNEL DIGITAL ISOLATORS

Silicon Laboratories 

Si8610/20/21/22

Table 2. Electrical Characteristics (Continued)

(VDD1 = 5 V ±10%, VDD2 = 5 V ±10%, TA = –40 to 125 ºC)

Parameter

Symbol Test Condition

Min

Typ

Max Unit

10 Mbps Supply Current (All inputs = 5 MHz square wave, CI = 15 pF on all outputs)

Si8610Bx, Ex

VDD1

VDD2

—

1.2

2.0

mA

—

1.2

2.0

Si8620Bx, Ex

VDD1

VDD2

—

2.1

3.1

mA

—

2.2

3.3

Si8621Bx, Ex

VDD1

VDD2

—

2.2

3.3

mA

—

2.2

3.3

Si8622Bx, Ex

VDD1

VDD2

—

3.7

5.5

mA

—

4.4

6.7

100 Mbps Supply Current (All inputs = 50 MHz square wave, CI = 15 pF on all outputs)

Si8610Bx, Ex

VDD1

VDD2

Si8620Bx, Ex

VDD1

VDD2

Si8621Bx, Ex

VDD1

VDD2

Si8622Bx, Ex

VDD1

VDD2

—

—

—

—

—

—

—

—

Timing Characteristics

1.2

2.0

mA

4.8

6.7

2.1

3.1

mA

8.9

12.5

5.8

8.1

mA

5.8

8.1

7.6

10.6 mA

8.2

11.4

Si861x/2x Bx, Ex

Maximum Data Rate

0

—

150 Mbps

Minimum Pulse Width

—

—

5.0

ns

Propagation Delay

tPHL, tPLH See Figure 1

5.0

8.0

13

ns

Pulse Width Distortion

PWD

See Figure 1

—

0.2

4.5

ns

|tPLH - tPHL|

Propagation Delay Skew2

tPSK(P-P)

—

2.0

4.5

ns

Channel-Channel Skew

tPSK

—

0.4

2.5

ns

Notes:

1. The nominal output impedance of an isolator driver channel is approximately 50 , ±40%, which is a

combination of the value of the on-chip series termination resistor and channel resistance of the output driver

FET. When driving loads where transmission line effects will be a factor, output pins should be appropriately

terminated with controlled impedance PCB traces.

2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units

operating at the same supply voltages, load, and ambient temperature.

3. Start-up time is the time period from the application of power to valid data at the output.

6

Rev. 1.3

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