ML4823IP データシートの表示（PDF） - Micro Linear Corporation
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ML4823IP Datasheet PDF : 9 Pages
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ML4823
PIN CONFIGURATION
ML4823
16-PIN DIP (P16)
16-PIN SOIC (S16W)
INV
NI
E/A OUT
CLOCK
RT
CT
RAMP
SS
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
TOP VIEW
5.1V REF
VCC
OUTPUT
VC
PWR GND
ILIM REF
GND
ILIM/S.D.
ML4823
20-PIN PLCC (Q20)
3 2 1 20 19
E/A OUT 4
18
CLOCK 5
17
NC 6
16
RT 7
15
CT 8
14
9 10 11 12 13
OUTPUT
VC
NC
PWR GND
ILIM REF
TOP VIEW
PIN DESCRIPTION (Pin Numbers in Parentheses are for PLCC Version)
PIN NAME FUNCTION
1 (2) INV
Inverting input to error amp.
2 (3) NI
Non-inverting input to error amp.
3 (4) E/A OUT Output of error amplifier and input to
main comparator.
4 (5) CLOCK Oscillator output.
5 (7) RT
Timing resistor for oscillator — sets
charging current for oscillator timing
capacitor (pin 6).
6 (8) CT
7 (9) RAMP
Timing capacitor for oscillator.
Non-inverting input to main
comparator. Connected to CT for
Voltage mode operation or to current
sense resistor for current mode.
8 (10) SS
Normally connected to soft start
capacitor.
PIN NAME FUNCTION
9 (12) ILIM/S.D. Current limit sense pin. Normally
connected to current sense resistor.
10 (13) GND
Analog signal ground.
11 (14) ILIM REF Reference input for cycle-by-cycle
current limit comparator.
12 (15) PWR GND Return for the high current totem
pole output.
13 (17) VC
Positive supply for the high current
totem pole output.
14 (18) OUT B High current totem pole output.
15 (19) VCC
16 (20) 5.1V REF
Positive supply for the IC.
Buffered output for the 5.1V voltage
reference.
2
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