MC33887(2002) データシートの表示（PDF） - Motorola => Freescale
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MC33887 Datasheet PDF : 20 Pages
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SYSTEM/APPLICATION INFORMATION
INTRODUCTION
Numerous protection and operational features (speed,
torque, direction, dynamic breaking, PWM control, and closed-
loop control), in addition to the 6.0 A output current capability,
make the 33887 a very attractive cost-effective solution for
controlling a broad range of fractional horsepower DC-motors.
A pair of 33887 devices can be used to control bipolar stepper
motors in both directions. In addition, the 33887 can be used to
control permanent magnet solenoids in a push-pull variable
force fashion using PWM control. The 33887 can also be used
to excite transformer primary windings with a switched square
wave to produce secondary winding AC currents.
As shown in Figure 1, Internal Block Diagram, the 33887 is a
fully protected monolithic H-Bridge with Enable, Fault Status
reporting, and High-Side current sense feedback to
accommodate closed-loop PWM control. For a DC-motor to run
the input conditions need be as follows: Enable input logic
HIGH, D1 input logic LOW, D2 input logic HIGH, FS flag cleared
(logic HIGH), with one IN logic LOW and the IN other logic HIGH
to define output polarity. The 33887 can execute Dynamic
Breaking by simultaneously turning-ON either the two High-
Side or the two Low-Side H-Bridge switches; e.g., IN1 and IN2
logic HIGH or IN1 and IN2 logic LOW.
The 33887 outputs are capable of providing a continuous DC
load current of 6.0 A from a 36 V VPWR source. An internal
charge pump supports PWM frequencies to 10 kHz. An external
pull-up resistor is required for the open drain FS pin for fault
status reporting. The 33887 has a current feedback output (FB)
for “real time” monitoring of output current to facilitate closed-
loop operation for motor speed and torque control.
Two independent inputs (IN1 and IN2) provide control of the
two totem-pole half-bridge outputs. Two disable inputs (D1 and
D2) are for forcing the H-Bridge outputs to a high impedance
state (all H-Bridge switches OFF). An EN pin controls an enable
function that allows the 33887 to be placed in a power-
conserving sleep mode.
The 33887 has Undervoltage Shutdown with automatic
recovery, Output Current Limiting, Output Short-Circuit Latch-
OFF, and Overtemperature Latch-OFF. An Undervoltage
Shutdown, Output Short-Circuit Latch-OFF, or
Overtemperature Latch-OFF fault condition will cause the
outputs to turn-OFF (tristate) and the fault output flag to be set
LOW. Either of the D inputs or VPWR must be “toggled” to clear
the fault flag. The Overcurrent/Overtemperature Shutdown
scheme is unique and best described as using a junction
temperature dependent output current “fold back” protection
scheme. When an overcurrent condition is experienced, the
current limited output is “ramped down” as the junction
temperature increases above 160°C, until at 175°C the output
current has decreased to about 2.5 A. Above 175°C, the
Overtemperature Shutdown (Latch-OFF) occurs. This feature
allows the device to remain in operation for a longer time with
unexpected loads, but with regressive output performance at
junction temperatures above 160°C.
FUNCTIONAL PIN DESCRIPTION
PGND and AGND
Power and analog ground pins. The power and analog
ground pins should be connected together with a very low
impedance connection.
Fault Status (FS)
This pin is the device fault status output. This output is an
active LOW open drain structure requiring a pull-up resistor to
5.0 V. Refer to Table 1, Truth Table.
VPWR
VPWR pins are the power supply inputs to the device. All VPWR
pins must be connected together on the printed circuit board
with as short as possible traces offering as low impedance as
possible between pins.
VPWR pins have an undervoltage threshold. If the supply
voltage drops below a VPWR undervoltage threshold, the output
power stage switches to a tristate condition and the fault status
flag is SET and the Fault Status pin voltage switched to a logic
LOW. When the supply voltage returns to a level that is above
the threshold, the power stage automatically resumes normal
operation according to the established condition of the input
pins and the fault status flag is automatically reset logic HIGH.
IN1, IN2, D1, D2
These pins are input control pins used to control the outputs.
These pins are 5.0 V CMOS-compatible inputs with hysteresis.
The IN1 and IN2 independently control OUT1 and OUT2,
respectively. D1 and D2 are complimentary inputs used to
tristate disable the H-Bridge outputs.
When either D1 or D2 is SET (D1 = logic HIGH or D2 = logic
LOW) in the disable state, outputs OUT1 and OUT2 are both
tristate disabled; however, the rest of the device circuitry is fully
operational and the supply IPWR(standby) current is reduced to a
few milli-amperes. See Table 1, Truth Table, and STATIC
ELECTRICAL CHARACTERISTICS (continued) table.
OUT1, OUT2
These pins are the outputs of the H-Bridge with integrated
free-wheeling diodes. The bridge output is controlled using the
IN1, IN2, D1, and D2 inputs. The outputs have Pulse Width
33887
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MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
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