MAX4885 データシートの表示（PDF） - Maxim Integrated
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MAX4885 Datasheet PDF : 13 Pages
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Complete VGA 1:2 or 2:1 Multiplexer
+5V 10nF
0V OR V+ SEL
V+
R0, G0, B0
MAX4885
R1, G1, B1
R2, G2, B2
50Ω
GND
Timing Circuits/Timing Diagrams (continued)
NETWORK
ANALYZER
VIN
50Ω
50Ω
VOUT
MEAS
50Ω
REF
50Ω
OFF-ISOLATION = 20log ✕
VOUT
VIN
ON-LOSS = 20log ✕
VOUT
VIN
CROSSTALK = 20log ✕
VOUT
VIN
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN R0 AND R1 OR R2 ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN R0 AND R1 OR R2 ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 4. On-Loss, Off-Isolation, and Crosstalk
PIN
1
2
3
4
5
6
7
8
9
10
11, 21, 30
12, 20, 29
13
14
15
16
17
NAME
QP
R0
G0
B0
H0
V0
DDCA0
DDCB0
EN
VCL
V+
GND
DDCA2
DDCB2
R2
G2
B2
Pin Description
FUNCTION
Charge-Pump Enable, Active Low. Drive QP low for normal operation. Drive QP high to disable the
internal charge pump.
RGB Analog I/O
RGB Analog I/O
RGB Analog I/O
Horizontal Sync I/O
Vertical Sync I/O
DDC I/O
DDC I/O
Enable Input, Active Low. Drive EN low for normal operation. Drive EN high to disable the device. All
I/Os are high-impedance and charge pump is off when the device is disabled.
DDC Clamp Voltage. Open-drain DDCA_ and DDCB_ outputs are clamped to one diode-drop below
VCL. +2.7V < VCL < V+. Connect VCL to +3.3V for voltage clamping, or connect to V+ to disable
clamping. Bypass VCL to GND with a 0.1µF or larger ceramic capacitor.
Supply Voltage. V+ = +5.0V ± 10%. Bypass each to GND with a 0.1µF or larger ceramic capacitor.
Ground
DDC I/O
DDC I/O
RGB Analog I/O
RGB Analog I/O
RGB Analog I/O
8 _______________________________________________________________________________________
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