SAA7377GP データシートの表示（PDF） - Philips Electronics

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SAA7377GP

Digital servo processor and Compact Disc decoder (CD7)

Philips Electronics 

Philips Semiconductors

Digital servo processor and Compact Disc

decoder (CD7)

Product specifications

SAA7377

7.8 DAC interface

The SAA7377 is compatible with a wide range of digital-to-analog converters (DACs). Nine formats are supported and

are given in Table 4. Figures 11 and 12 show the Philips I2S-bus and the EIAJ data formats respectively. All formats are

MSB first and fs is 44.1 kHz. The polarity of the WCLK and the data can be inverted; selectable by register 7.

Table 4 DAC interface formats

REGISTER 3

1110

0010

0110

0000

0100

1100

0011

0111

1111

SAMPLE

FREQUENCY

fs

fs

fs

4fs

4fs

4fs

2fs

2fs

2fs

NUMBER OF

BITS

16/18(1)

16

18

16

18

18

16

18

18

SCLK (MHz)

FORMAT

2.1168

2.1168

2.1168

8.4672

8.4672

8.4672

4.2336

4.2336

4.2336

Philips I2S-bus; 16/18 bits(1)

EIAJ 16 bits

EIAJ 18 bits

EIAJ 16 bits

EIAJ 18 bits

Philips I2S-bus; 18 bits

EIAJ 16 bits

EIAJ 18 bits

Philips I2S-bus; 18 bits

INTERPOLATION

yes

yes

yes

yes

yes

yes

yes

yes

yes

Note

1. In this mode the first 16 bits contain data, but if any of the fade, attenuate or de-emphasis filter functions are activated

then the first 18 bits contain data.

1998 Jul 06

15

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