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CL10K50VBC356-4 データシートの表示(PDF) - Clear Logic

部品番号
コンポーネント説明
メーカー
CL10K50VBC356-4
Clear-Logic
Clear Logic 
CL10K50VBC356-4 Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
LIBERATOR CL10K50V
AC Electrical Specifications cont.
Interconnect Timing Parameters[5]
Symbol
Parameter
Speed: -1
Min Max
tDIN2IOE
Delay from Dedicated Input Pin to IOE
Control Input
4.7
tDIN2LE
Delay from Dedicated Input Pin to LE
or EAB Control Input
2.5
tDIN2DATA
Delay from Dedicated Input or Clock
Pin to LE or EAB Data
4.4
tDCLK2IOE
Delay from Dedicated Clock Pin to IOE
Clock
2.5
tDCLK2LE
Delay from Dedicated Clock Pin to LE
or EAB Clock
2.5
Speed: -2
Min Max
6.0
2.6
5.9
3.9
2.6
Speed: -3
Min Max
7.1
3.1
6.8
4.7
3.1
Speed: -4
Min Max Unit
8.2 ns
3.9 ns
7.7 ns
5.5 ns
3.9 ns
tSAMELAB Delay from an LE to LE in Same LAB
0.2
0.2
0.3
0.3 ns
tSAMEROW
Delay for Driving a Row IOE, LE or
EAB to a Row IOE, LE or EAB in the
Same Row
2.8
3.0
3.2
3.4 ns
tSAMECOLUMN
Delay from an LE to IOE in the Same
Column
3.0
3.2
3.4
3.6 ns
Delay for Driving a Column IOE, LE or
tDIFFROW EAB to an LE or EAB in a Different
Row
5.8
6.2
6.6
7.0 ns
tTWOROWS
Delay for Driving a Row IOE or EAB to
an LE or EAB in a Different Row
8.6
9.2
9.8
10.4 ns
tLEPERIPH
Delay from an LE to IOE Control
Signal via the Peripheral Dontol Bus
4.5
5.5
6.1
7.0 ns
Delay from an LE Carry-out Signal to
tLABCARRY an LE Carry-in Signal in a Different
LAB
0.3
0.4
0.5
0.7 ns
Delay from an LE Cascade-out Signal
tLABCASC to an LE Cascade-in Signal in a
Different LAB
0.0
1.3
1.6
2.0 ns
10KA tbl 09A
Page 11

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