CL10K50V データシートの表示（PDF） - Clear Logic
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CL10K50V Datasheet PDF : 16 Pages
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LIBERATOR CL10K50V
AC Electrical Specifications cont.
EAB Timing Parameters[5]
Symbol
Parameter
tEABAA EAB Address Access Delay
tEABRCCOMB EAB Asynchronous Read Cycle Time
tEABRCREG EAB Synchronous Read Cycle Time
tEABWP EAB Write Pulse Width
tEABWCCOMB EAB Asynchronous Write Cycle Time
tEABWCREG EAB Synchronous Write Cycle Time
tEABDD EAB Data-in to Data-out Delay
tEABDATACO
EAB Clock-to-output
Output Registers
Delay
Using
tEABDATASU
EAB Data/Address
Input Register
Setup
Tim e
Using
tEABDATAH
EAB Data/Address Hold Time Using
Input Register
tEABWESU
EAB WE Setup When Using Input
Regis ter
tEABWESH
EAB WE Hold Time When Using Input
Regis ter
EAB Data Setup Time to Falling Edge
tEABWDSU of Write Pulse When Not Using Input
Regis ters
Speed: -1
Min Max
9.5
9.5
6.1
6
6.2
12
6.8
1.0
5.3
0
4.4
0
1.8
Speed: -2
Min Max
13.6
13.6
8.8
4.9
6.1
11.6
9.7
1.4
4.6
0
4.8
0
1.1
Speed: -3
Min Max
16.5
16.5
10.8
6.0
7.5
14.2
11.8
1.8
5.6
0.0
5.8
0.0
1.4
Speed: -4
Min Max Unit
20.8 ns
20.8
ns
13.4
ns
7.4
ns
9.2
ns
17.4
ns
14.9 ns
2.2 ns
6.9
ns
0.0
ns
7.2
ns
0.0
ns
2.1
ns
EAB Data Hold Time After Falling
tEABWDH Edge of Write Pulse When Not Using
0
Input Registers
0
0.0
0.0
ns
EAB Address Setup Time to Rising
tEABWASU Edge of Write Pulse When Not Using 4.5
4.6
5.6
7.4
ns
Input Registers
EAB Address Hold Time After Falling
tEABWAH Edge of Write Pulse When Not Using
0
Input Registers
0
0.0
0.0
ns
tEABWO EAB WE to Data Output Delay
5.1
9.4
11.4
14.0 ns
10KA tbl 11A
Page 13
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